Lines Matching +full:architecturally +full:- +full:defined
1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1996-2003 Russell King
24 #include <linux/irqchip/arm-gic-v3-prio.h>
35 /* AArch32-specific ptrace requests */
68 #define PSR_AA32_IT_MASK 0x0600fc00 /* If-Then execution state mask */
90 * a syscall -- i.e., its most recent entry into the kernel from
93 * This must have the value -1, for ABI compatibility with ptrace etc.
95 #define NO_SYSCALL (-1)
106 /* Architecturally defined mapping between AArch32 and AArch64 registers */
183 return regs->syscallno != NO_SYSCALL; in in_syscall()
188 regs->syscallno = NO_SYSCALL; in forget_syscall()
197 (((regs)->pstate & PSR_AA32_T_BIT))
203 (((regs)->pstate & PSR_MODE_MASK) == PSR_MODE_EL0t)
206 (((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \
210 ((regs)->pstate & PSR_MODE_MASK)
214 (regs)->pmr == GIC_PRIO_IRQON : \
218 (!((regs)->pstate & PSR_I_BIT) && irqs_priority_unmasked(regs))
221 (!((regs)->pstate & PSR_F_BIT))
226 return regs->compat_sp; in user_stack_pointer()
227 return regs->sp; in user_stack_pointer()
235 * regs_get_register() - get register value from its offset
252 val = regs->regs[offset]; in regs_get_register()
255 val = regs->sp; in regs_get_register()
258 val = regs->pc; in regs_get_register()
261 val = regs->pstate; in regs_get_register()
276 return (r == 31) ? 0 : regs->regs[r]; in pt_regs_read_reg()
287 regs->regs[r] = val; in pt_regs_write_reg()
293 return regs->sp; in kernel_stack_pointer()
298 unsigned long val = regs->regs[0]; in regs_return_value()
302 * syscall_get_return_value(). Apply the same sign-extension here until in regs_return_value()
313 regs->regs[0] = rc; in regs_set_return_value()
317 * regs_get_kernel_argument() - get Nth function argument in kernel
344 return regs->pc; in instruction_pointer()
349 regs->pc = val; in instruction_pointer_set()
354 return regs->regs[29]; in frame_pointer()
357 #define procedure_link_pointer(regs) ((regs)->regs[30])