Lines Matching +full:0 +full:x10004

32 #define PSR_MODE_THREAD_BIT	(1 << 0)
46 #define PSR_AA32_MODE_MASK	0x0000001f
47 #define PSR_AA32_MODE_USR	0x00000010
48 #define PSR_AA32_MODE_FIQ	0x00000011
49 #define PSR_AA32_MODE_IRQ	0x00000012
50 #define PSR_AA32_MODE_SVC	0x00000013
51 #define PSR_AA32_MODE_ABT	0x00000017
52 #define PSR_AA32_MODE_HYP	0x0000001a
53 #define PSR_AA32_MODE_UND	0x0000001b
54 #define PSR_AA32_MODE_SYS	0x0000001f
55 #define PSR_AA32_T_BIT		0x00000020
56 #define PSR_AA32_F_BIT		0x00000040
57 #define PSR_AA32_I_BIT		0x00000080
58 #define PSR_AA32_A_BIT		0x00000100
59 #define PSR_AA32_E_BIT		0x00000200
60 #define PSR_AA32_PAN_BIT	0x00400000
61 #define PSR_AA32_SSBS_BIT	0x00800000
62 #define PSR_AA32_DIT_BIT	0x01000000
63 #define PSR_AA32_Q_BIT		0x08000000
64 #define PSR_AA32_V_BIT		0x10000000
65 #define PSR_AA32_C_BIT		0x20000000
66 #define PSR_AA32_Z_BIT		0x40000000
67 #define PSR_AA32_N_BIT		0x80000000
68 #define PSR_AA32_IT_MASK	0x0600fc00	/* If-Then execution state mask */
69 #define PSR_AA32_GE_MASK	0x000f0000
74 #define PSR_AA32_ENDSTATE	0
78 #define COMPAT_PSR_DIT_BIT	0x00200000
84 #define COMPAT_PT_TEXT_ADDR		0x10000
85 #define COMPAT_PT_DATA_ADDR		0x10004
86 #define COMPAT_PT_TEXT_END_ADDR		0x10008
199 #define compat_thumb_mode(regs) (0)
241  * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
245 	u64 val = 0;  in regs_get_register()
251 	case 0 ... 30:  in regs_get_register()
264 		val = 0;  in regs_get_register()
276 	return (r == 31) ? 0 : regs->regs[r];  in pt_regs_read_reg()
298 	unsigned long val = regs->regs[0];  in regs_return_value()
313 	regs->regs[0] = rc;  in regs_set_return_value()
319  * @n:		function argument number (start from 0)
335 	return 0;  in regs_get_kernel_argument()