Lines Matching +full:0487 +full:a

43  * To expand a little on the "most versions of it"... when the gdb remote
44  * protocol for AArch64 was developed it depended on a statement in the
45  * Architecture Reference Manual that claimed "SPSR_ELx is a 32-bit register".
46  * and, as a result, allocated only 32-bits for the PSTATE in the remote
47  * protocol. In fact this statement is still present in ARM DDI 0487A.i.
49  * Unfortunately "is a 32-bit register" has a very special meaning for
51  * RES0.". RES0 is heavily used in the ARM architecture documents as a
52  * way to leave space for future architecture changes. So to translate a
54  * manuals, what "is a 32-bit register" actually means in this context is
55  * "is a 64-bit register but one with no meaning allocated to any of the
59  * confusion. Specifically a patch, influenced by the above translation,
71  * without providing a custom register description (gdb can load new