Lines Matching +full:spe +full:- +full:pmu
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2012,2013 - ARM Ltd
11 #error Assembly-only header
17 #include <linux/irqchip/arm-gic-v3.h>
23 * Compliant CPUs advertise their VHE-onlyness with
76 * Allow Non-secure EL1 and EL0 to access physical timer and counter.
99 b.eq .Lskip_pmu_\@ // Skip if no PMU present or IMP_DEF
103 csel x2, xzr, x0, eq // all PMU counters from EL1
107 cbz x0, .Lskip_spe_\@ // Skip if SPE not present
109 mrs_s x0, SYS_PMBIDR_EL1 // If SPE available at EL2,
146 /* Stage-2 translation */
306 msr_s SYS_MPAMHCR_EL2, xzr // clear TRAP_MPAMIDR_EL1 -> EL2