Lines Matching full:rcc

6 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
8 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
246 clocks = <&rcc CK_BUS_SPI2>, <&rcc CK_KER_SPI2>;
248 resets = <&rcc SPI2_R>;
262 clocks = <&rcc CK_KER_SPI2>;
263 resets = <&rcc SPI2_R>;
276 clocks = <&rcc CK_BUS_SPI3>, <&rcc CK_KER_SPI3>;
278 resets = <&rcc SPI3_R>;
292 clocks = <&rcc CK_KER_SPI3>;
293 resets = <&rcc SPI3_R>;
305 clocks = <&rcc CK_KER_SPDIFRX>;
319 clocks = <&rcc CK_KER_USART2>;
331 clocks = <&rcc CK_KER_USART3>;
343 clocks = <&rcc CK_KER_UART4>;
355 clocks = <&rcc CK_KER_UART5>;
368 clocks = <&rcc CK_KER_I2C1>;
369 resets = <&rcc I2C1_R>;
384 clocks = <&rcc CK_KER_I2C2>;
385 resets = <&rcc I2C2_R>;
400 clocks = <&rcc CK_KER_I2C3>;
401 resets = <&rcc I2C3_R>;
416 clocks = <&rcc CK_KER_I2C4>;
417 resets = <&rcc I2C4_R>;
432 clocks = <&rcc CK_KER_I2C5>;
433 resets = <&rcc I2C5_R>;
448 clocks = <&rcc CK_KER_I2C6>;
449 resets = <&rcc I2C6_R>;
464 clocks = <&rcc CK_KER_I2C7>;
465 resets = <&rcc I2C7_R>;
479 clocks = <&rcc CK_KER_USART6>;
492 clocks = <&rcc CK_BUS_SPI1>, <&rcc CK_KER_SPI1>;
494 resets = <&rcc SPI1_R>;
508 clocks = <&rcc CK_KER_SPI1>;
509 resets = <&rcc SPI1_R>;
523 clocks = <&rcc CK_KER_SPI4>;
524 resets = <&rcc SPI4_R>;
538 clocks = <&rcc CK_KER_SPI5>;
539 resets = <&rcc SPI5_R>;
553 clocks = <&rcc CK_BUS_SAI1>;
556 resets = <&rcc SAI1_R>;
564 clocks = <&rcc CK_KER_SAI1>;
574 clocks = <&rcc CK_KER_SAI1>;
587 clocks = <&rcc CK_BUS_SAI2>;
590 resets = <&rcc SAI2_R>;
598 clocks = <&rcc CK_KER_SAI2>;
608 clocks = <&rcc CK_KER_SAI2>;
621 clocks = <&rcc CK_BUS_SAI3>;
624 resets = <&rcc SAI3_R>;
632 clocks = <&rcc CK_KER_SAI3>;
642 clocks = <&rcc CK_KER_SAI3>;
653 clocks = <&rcc CK_KER_UART9>;
665 clocks = <&rcc CK_KER_USART1>;
679 clocks = <&rcc CK_BUS_SAI4>;
682 resets = <&rcc SAI4_R>;
690 clocks = <&rcc CK_KER_SAI4>;
700 clocks = <&rcc CK_KER_SAI4>;
713 clocks = <&rcc CK_KER_SPI6>;
714 resets = <&rcc SPI6_R>;
728 clocks = <&rcc CK_KER_SPI7>;
729 resets = <&rcc SPI7_R>;
741 clocks = <&rcc CK_KER_UART7>;
753 clocks = <&rcc CK_KER_UART8>;
764 clocks = <&clk_rcbsec>, <&rcc CK_BUS_RNG>;
766 resets = <&rcc RNG_R>;
777 clocks = <&rcc CK_KER_SPI8>;
778 resets = <&rcc SPI8_R>;
791 clocks = <&rcc CK_KER_I2C8>;
792 resets = <&rcc I2C8_R>;
806 resets = <&rcc CSI_R>;
807 clocks = <&rcc CK_KER_CSI>, <&rcc CK_KER_CSITXESC>,
808 <&rcc CK_KER_CSIPHY>;
818 resets = <&rcc DCMIPP_R>;
819 clocks = <&rcc CK_BUS_DCMIPP>, <&rcc CK_KER_CSI>;
829 clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>;
831 resets = <&rcc USB3PCIEPHY_R>;
845 clocks = <&rcc CK_KER_SDMMC1 >;
847 resets = <&rcc SDMMC1_R>;
867 clocks = <&rcc CK_ETH1_MAC>,
868 <&rcc CK_ETH1_TX>,
869 <&rcc CK_ETH1_RX>,
870 <&rcc CK_KER_ETH1PTP>,
871 <&rcc CK_ETH1_STP>,
872 <&rcc CK_KER_ETH1>;
921 rcc: clock-controller@44200000 { label
922 compatible = "st,stm32mp25-rcc";