Lines Matching +full:pinmux +full:-
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 eth2_rgmii_pins_a: eth2-rgmii-0 {
11 pinmux = <STM32_PINMUX('C', 7, AF10)>, /* ETH_RGMII_TXD0 */
16 bias-disable;
17 drive-push-pull;
18 slew-rate = <3>;
21 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* ETH_RGMII_CLK125 */
24 bias-disable;
25 drive-push-pull;
26 slew-rate = <3>;
29 pinmux = <STM32_PINMUX('C', 5, AF10)>; /* ETH_MDIO */
30 bias-disable;
31 drive-push-pull;
32 slew-rate = <0>;
35 pinmux = <STM32_PINMUX('G', 0, AF10)>, /* ETH_RGMII_RXD0 */
40 bias-disable;
43 pinmux = <STM32_PINMUX('F', 6, AF10)>; /* ETH_RGMII_RX_CLK */
44 bias-disable;
48 eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 {
50 pinmux = <STM32_PINMUX('C', 7, ANALOG)>, /* ETH_RGMII_TXD0 */
68 i2c2_pins_a: i2c2-0 {
70 pinmux = <STM32_PINMUX('B', 5, AF9)>, /* I2C2_SCL */
72 bias-disable;
73 drive-open-drain;
74 slew-rate = <0>;
78 i2c2_sleep_pins_a: i2c2-sleep-0 {
80 pinmux = <STM32_PINMUX('B', 5, ANALOG)>, /* I2C2_SCL */
85 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
87 pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
92 slew-rate = <2>;
93 drive-push-pull;
94 bias-disable;
97 pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */
98 slew-rate = <3>;
99 drive-push-pull;
100 bias-disable;
104 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
106 pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
110 slew-rate = <2>;
111 drive-push-pull;
112 bias-disable;
115 pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */
116 slew-rate = <3>;
117 drive-push-pull;
118 bias-disable;
121 pinmux = <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */
122 slew-rate = <2>;
123 drive-open-drain;
124 bias-disable;
128 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
130 pinmux = <STM32_PINMUX('E', 4, ANALOG)>, /* SDMMC1_D0 */
139 spi3_pins_a: spi3-0 {
141 pinmux = <STM32_PINMUX('B', 7, AF1)>, /* SPI3_SCK */
143 drive-push-pull;
144 bias-disable;
145 slew-rate = <1>;
148 pinmux = <STM32_PINMUX('B', 10, AF1)>; /* SPI3_MISO */
149 bias-disable;
153 spi3_sleep_pins_a: spi3-sleep-0 {
155 pinmux = <STM32_PINMUX('B', 7, ANALOG)>, /* SPI3_SCK */
161 usart2_pins_a: usart2-0 {
163 pinmux = <STM32_PINMUX('A', 4, AF6)>; /* USART2_TX */
164 bias-disable;
165 drive-push-pull;
166 slew-rate = <0>;
169 pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
170 bias-disable;
174 usart2_idle_pins_a: usart2-idle-0 {
176 pinmux = <STM32_PINMUX('A', 4, ANALOG)>; /* USART2_TX */
179 pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
180 bias-disable;
184 usart2_sleep_pins_a: usart2-sleep-0 {
186 pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* USART2_TX */
191 usart6_pins_a: usart6-0 {
193 pinmux = <STM32_PINMUX('F', 13, AF3)>, /* USART6_TX */
195 bias-disable;
196 drive-push-pull;
197 slew-rate = <0>;
200 pinmux = <STM32_PINMUX('F', 14, AF3)>, /* USART6_RX */
202 bias-pull-up;
206 usart6_idle_pins_a: usart6-idle-0 {
208 pinmux = <STM32_PINMUX('F', 13, ANALOG)>, /* USART6_TX */
212 pinmux = <STM32_PINMUX('G', 5, AF3)>; /* USART6_RTS */
213 bias-disable;
214 drive-push-pull;
215 slew-rate = <0>;
218 pinmux = <STM32_PINMUX('F', 14, AF3)>; /* USART6_RX */
219 bias-pull-up;
223 usart6_sleep_pins_a: usart6-sleep-0 {
225 pinmux = <STM32_PINMUX('F', 13, ANALOG)>, /* USART6_TX */
234 i2c8_pins_a: i2c8-0 {
236 pinmux = <STM32_PINMUX('Z', 4, AF8)>, /* I2C8_SCL */
238 bias-disable;
239 drive-open-drain;
240 slew-rate = <0>;
244 i2c8_sleep_pins_a: i2c8-sleep-0 {
246 pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C8_SCL */
253 spi8_pins_a: spi8-0 {
255 pinmux = <STM32_PINMUX('Z', 2, AF3)>, /* SPI8_SCK */
257 drive-push-pull;
258 bias-disable;
259 slew-rate = <1>;
262 pinmux = <STM32_PINMUX('Z', 1, AF3)>; /* SPI8_MISO */
263 bias-disable;
267 spi8_sleep_pins_a: spi8-sleep-0 {
269 pinmux = <STM32_PINMUX('Z', 2, ANALOG)>, /* SPI8_SCK */