Lines Matching +full:quartz +full:- +full:load +full:- +full:femtofarads
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the R9A08G045S33 SMARC Carrier-II's SoM board.
8 #include <dt-bindings/clock/renesas,r9a08g045-vbattb.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
13 * On-board switches' states:
23 * SW_OFF - SD0 is connected to eMMC
24 * SW_ON - SD0 is connected to uSD0 card
26 * SW_OFF - SD2 is connected to SoC
27 * SW_ON - SCIF1, SSI0, IRQ0, IRQ1 connected to SoC
33 compatible = "renesas,rzg3s-smarcm", "renesas,r9a08g045s33", "renesas,r9a08g045";
53 compatible = "regulator-fixed";
54 regulator-name = "SDHI0 Vcc";
55 regulator-min-microvolt = <3300000>;
56 regulator-max-microvolt = <3300000>;
58 enable-active-high;
62 compatible = "regulator-gpio";
63 regulator-name = "SDHI0 VccQ";
64 regulator-min-microvolt = <1800000>;
65 regulator-max-microvolt = <3300000>;
67 gpios-states = <1>;
72 compatible = "regulator-fixed";
73 regulator-name = "fixed-1.8V";
74 regulator-min-microvolt = <1800000>;
75 regulator-max-microvolt = <1800000>;
76 regulator-boot-on;
77 regulator-always-on;
81 compatible = "regulator-fixed";
82 regulator-name = "fixed-3.3V";
83 regulator-min-microvolt = <3300000>;
84 regulator-max-microvolt = <3300000>;
85 regulator-boot-on;
86 regulator-always-on;
90 compatible = "regulator-fixed";
91 regulator-name = "SDHI2 Vcc";
92 regulator-min-microvolt = <3300000>;
93 regulator-max-microvolt = <3300000>;
95 enable-active-high;
98 x3_clk: x3-clock {
99 compatible = "fixed-clock";
100 #clock-cells = <0>;
101 clock-frequency = <24000000>;
111 pinctrl-0 = <ð0_pins>;
112 pinctrl-names = "default";
113 phy-handle = <&phy0>;
114 phy-mode = "rgmii-id";
117 phy0: ethernet-phy@7 {
119 interrupts-extended = <&pinctrl RZG2L_GPIO(12, 0) IRQ_TYPE_EDGE_FALLING>;
120 rxc-skew-psec = <0>;
121 txc-skew-psec = <0>;
122 rxdv-skew-psec = <0>;
123 txen-skew-psec = <0>;
124 rxd0-skew-psec = <0>;
125 rxd1-skew-psec = <0>;
126 rxd2-skew-psec = <0>;
127 rxd3-skew-psec = <0>;
128 txd0-skew-psec = <0>;
129 txd1-skew-psec = <0>;
130 txd2-skew-psec = <0>;
131 txd3-skew-psec = <0>;
136 pinctrl-0 = <ð1_pins>;
137 pinctrl-names = "default";
138 phy-handle = <&phy1>;
139 phy-mode = "rgmii-id";
142 phy1: ethernet-phy@7 {
144 interrupts-extended = <&pinctrl RZG2L_GPIO(12, 1) IRQ_TYPE_EDGE_FALLING>;
145 rxc-skew-psec = <0>;
146 txc-skew-psec = <0>;
147 rxdv-skew-psec = <0>;
148 txen-skew-psec = <0>;
149 rxd0-skew-psec = <0>;
150 rxd1-skew-psec = <0>;
151 rxd2-skew-psec = <0>;
152 rxd3-skew-psec = <0>;
153 txd0-skew-psec = <0>;
154 txd1-skew-psec = <0>;
155 txd2-skew-psec = <0>;
156 txd3-skew-psec = <0>;
162 clock-frequency = <24000000>;
168 versa3: clock-generator@68 {
172 #clock-cells = <1>;
173 assigned-clocks = <&versa3 0>,
179 assigned-clock-rates = <24000000>,
196 pinctrl-0 = <&sdhi0_pins>;
197 pinctrl-1 = <&sdhi0_uhs_pins>;
198 pinctrl-names = "default", "state_uhs";
199 vmmc-supply = <&vcc_sdhi0>;
200 vqmmc-supply = <&vccq_sdhi0>;
201 bus-width = <4>;
202 sd-uhs-sdr50;
203 sd-uhs-sdr104;
204 max-frequency = <125000000>;
210 pinctrl-0 = <&sdhi0_emmc_pins>;
211 pinctrl-1 = <&sdhi0_emmc_pins>;
212 pinctrl-names = "default", "state_uhs";
213 vmmc-supply = <&vcc_sdhi0>;
214 vqmmc-supply = <®_1p8v>;
215 bus-width = <8>;
216 mmc-hs200-1_8v;
217 non-removable;
218 fixed-emmc-driver-type = <1>;
219 max-frequency = <125000000>;
226 pinctrl-0 = <&sdhi2_pins>;
227 pinctrl-names = "default";
228 vmmc-supply = <&vcc_sdhi2>;
229 bus-width = <4>;
230 max-frequency = <50000000>;
237 eth0-phy-irq-hog {
238 gpio-hog;
241 line-name = "eth0-phy-irq";
248 power-source = <1800>;
249 output-enable;
250 input-enable;
251 drive-strength-microamp = <5200>;
256 power-source = <1800>;
257 output-enable;
258 drive-strength-microamp = <5200>;
275 power-source = <1800>;
280 eth1-phy-irq-hog {
281 gpio-hog;
284 line-name = "eth1-phy-irq";
291 power-source = <1800>;
292 output-enable;
293 input-enable;
294 drive-strength-microamp = <5200>;
299 power-source = <1800>;
300 output-enable;
301 drive-strength-microamp = <5200>;
318 power-source = <1800>;
325 power-source = <3300>;
330 power-source = <3300>;
338 sdhi0_uhs_pins: sd0-uhs {
341 power-source = <1800>;
346 power-source = <1800>;
354 sdhi0_emmc_pins: sd0-emmc {
358 power-source = <1800>;
364 input-enable;
369 input-enable;
389 assigned-clocks = <&vbattb VBATTB_MUX>;
390 assigned-clock-parents = <&vbattb VBATTB_XC>;
391 quartz-load-femtofarads = <12500>;
396 clock-frequency = <32768>;
400 timeout-sec = <60>;