Lines Matching +full:1 +full:a400
73 #address-cells = <1>;
116 gpu_opp_table: opp-table-1 {
287 ssi2: ssi@1004a400 {
338 num-cs = <1>;
339 #address-cells = <1>;
356 num-cs = <1>;
357 #address-cells = <1>;
374 num-cs = <1>;
375 #address-cells = <1>;
535 #address-cells = <1>;
557 #address-cells = <1>;
579 #address-cells = <1>;
601 #address-cells = <1>;
635 #address-cells = <1>;
641 channel@1 {
642 reg = <1>;
671 #thermal-sensor-cells = <1>;
686 #address-cells = <1>;
709 #address-cells = <1>;
713 #address-cells = <1>;
722 port@1 {
723 #address-cells = <1>;
726 reg = <1>;
750 #address-cells = <1>;
757 port@1 {
758 #address-cells = <1>;
760 reg = <1>;
798 #address-cells = <1>;
808 port@1 {
809 reg = <1>;
853 #address-cells = <1>;
863 port@1 {
864 reg = <1>;
875 #reset-cells = <1>;
915 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
973 "ec7tiovf-0", "ec7tie1-1", "ec7tie2-1",
974 "ec7tiovf-1";
1016 #dma-cells = <1>;
1098 #address-cells = <1>;
1118 #address-cells = <1>;
1130 #reset-cells = <1>;
1146 phys = <&usb2_phy0 1>;
1158 resets = <&phyrst 1>,
1160 phys = <&usb2_phy1 1>;
1187 resets = <&phyrst 1>,
1204 #phy-cells = <1>;
1216 resets = <&phyrst 1>;
1217 #phy-cells = <1>;