Lines Matching +full:0 +full:xec5a0000
18 * The external audio clocks are configured as 0 Hz fixed frequency
24 #clock-cells = <0>;
25 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
36 #clock-cells = <0>;
37 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
71 #size-cells = <0>;
73 a53_0: cpu@0 {
75 reg = <0>;
99 L2_CA53: cache-controller-0 {
109 CPU_SLEEP_0: cpu-sleep-0 {
111 arm,psci-suspend-param = <0x0010000>;
122 #clock-cells = <0>;
124 clock-frequency = <0>;
130 #clock-cells = <0>;
131 clock-frequency = <0>;
149 #clock-cells = <0>;
150 clock-frequency = <0>;
163 reg = <0 0xe6020000 0 0x0c>;
174 reg = <0 0xe6050000 0 0x50>;
178 gpio-ranges = <&pfc 0 0 18>;
189 reg = <0 0xe6051000 0 0x50>;
193 gpio-ranges = <&pfc 0 32 23>;
204 reg = <0 0xe6052000 0 0x50>;
208 gpio-ranges = <&pfc 0 64 26>;
219 reg = <0 0xe6053000 0 0x50>;
223 gpio-ranges = <&pfc 0 96 16>;
234 reg = <0 0xe6054000 0 0x50>;
238 gpio-ranges = <&pfc 0 128 11>;
249 reg = <0 0xe6055000 0 0x50>;
253 gpio-ranges = <&pfc 0 160 20>;
264 reg = <0 0xe6055400 0 0x50>;
268 gpio-ranges = <&pfc 0 192 18>;
278 reg = <0 0xe6060000 0 0x508>;
283 #size-cells = <0>;
287 reg = <0 0xe60b0000 0 0x425>;
292 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
300 reg = <0 0xe60f0000 0 0x1004>;
313 reg = <0 0xe6130000 0 0x1004>;
332 reg = <0 0xe6140000 0 0x1004>;
351 reg = <0 0xe6148000 0 0x1004>;
369 reg = <0 0xe6150000 0 0x1000>;
373 #power-domain-cells = <0>;
379 reg = <0 0xe6160000 0 0x0200>;
384 reg = <0 0xe6180000 0 0x0400>;
390 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
397 #thermal-sensor-cells = <0>;
404 reg = <0 0xe61c0000 0 0x200>;
405 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
418 reg = <0 0xe61e0000 0 0x30>;
432 reg = <0 0xe6fc0000 0 0x30>;
447 reg = <0 0xe6fd0000 0 0x30>;
462 reg = <0 0xe6fe0000 0 0x30>;
476 reg = <0 0xffc00000 0 0x30>;
490 #size-cells = <0>;
493 reg = <0 0xe6500000 0 0x40>;
498 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
499 <&dmac2 0x91>, <&dmac2 0x90>;
507 #size-cells = <0>;
510 reg = <0 0xe6508000 0 0x40>;
515 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
516 <&dmac2 0x93>, <&dmac2 0x92>;
524 #size-cells = <0>;
527 reg = <0 0xe6510000 0 0x40>;
532 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
533 <&dmac2 0x95>, <&dmac2 0x94>;
541 #size-cells = <0>;
544 reg = <0 0xe66d0000 0 0x40>;
549 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
557 #size-cells = <0>;
560 reg = <0 0xe66d8000 0 0x40>;
565 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
573 #size-cells = <0>;
576 reg = <0 0xe66e0000 0 0x40>;
581 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
589 #size-cells = <0>;
592 reg = <0 0xe66e8000 0 0x40>;
597 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
605 #size-cells = <0>;
608 reg = <0 0xe6690000 0 0x40>;
621 reg = <0 0xe6540000 0 0x60>;
627 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
628 <&dmac2 0x31>, <&dmac2 0x30>;
639 reg = <0 0xe6550000 0 0x60>;
645 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
646 <&dmac2 0x33>, <&dmac2 0x32>;
657 reg = <0 0xe6560000 0 0x60>;
663 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
664 <&dmac2 0x35>, <&dmac2 0x34>;
675 reg = <0 0xe66a0000 0 0x60>;
681 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
692 reg = <0 0xe66b0000 0 0x60>;
698 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
708 reg = <0 0xe6590000 0 0x200>;
711 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
712 <&usb_dmac1 0>, <&usb_dmac1 1>;
725 reg = <0 0xe65a0000 0 0x100>;
739 reg = <0 0xe65b0000 0 0x100>;
753 reg = <0x0 0xe6601000 0 0x1000>;
762 reg = <0 0xe6700000 0 0x10000>;
791 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
804 reg = <0 0xe7300000 0 0x10000>;
833 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
846 reg = <0 0xe7310000 0 0x10000>;
887 reg = <0 0xe6740000 0 0x1000>;
888 renesas,ipmmu-main = <&ipmmu_mm 0>;
895 reg = <0 0xe7740000 0 0x1000>;
903 reg = <0 0xe6570000 0 0x1000>;
911 reg = <0 0xe67b0000 0 0x1000>;
920 reg = <0 0xec670000 0 0x1000>;
928 reg = <0 0xfd800000 0 0x1000>;
936 reg = <0 0xffc80000 0 0x1000>;
944 reg = <0 0xfe6b0000 0 0x1000>;
952 reg = <0 0xfebd0000 0 0x1000>;
960 reg = <0 0xfe990000 0 0x1000>;
969 reg = <0 0xe6800000 0 0x800>;
1007 rx-internal-delay-ps = <0>;
1010 #size-cells = <0>;
1017 reg = <0 0xe6c30000 0 0x1000>;
1033 reg = <0 0xe6c38000 0 0x1000>;
1049 reg = <0 0xe66c0000 0 0x8000>;
1074 reg = <0 0xe6e30000 0 0x8>;
1084 reg = <0 0xe6e31000 0 0x8>;
1094 reg = <0 0xe6e32000 0 0x8>;
1104 reg = <0 0xe6e33000 0 0x8>;
1114 reg = <0 0xe6e34000 0 0x8>;
1124 reg = <0 0xe6e35000 0 0x8>;
1134 reg = <0 0xe6e36000 0 0x8>;
1145 reg = <0 0xe6e60000 0 64>;
1151 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1152 <&dmac2 0x51>, <&dmac2 0x50>;
1162 reg = <0 0xe6e68000 0 64>;
1168 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1169 <&dmac2 0x53>, <&dmac2 0x52>;
1179 reg = <0 0xe6e88000 0 64>;
1185 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1186 <&dmac2 0x13>, <&dmac2 0x12>;
1196 reg = <0 0xe6c50000 0 64>;
1202 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1212 reg = <0 0xe6c40000 0 64>;
1218 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1228 reg = <0 0xe6f30000 0 64>;
1234 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1244 reg = <0 0xe6e90000 0 0x0064>;
1247 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1248 <&dmac2 0x41>, <&dmac2 0x40>;
1253 #size-cells = <0>;
1260 reg = <0 0xe6ea0000 0 0x0064>;
1263 dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1268 #size-cells = <0>;
1275 reg = <0 0xe6c00000 0 0x0064>;
1278 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1283 #size-cells = <0>;
1290 reg = <0 0xe6c10000 0 0x0064>;
1293 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1298 #size-cells = <0>;
1304 reg = <0 0xe6ef4000 0 0x1000>;
1314 #size-cells = <0>;
1318 #size-cells = <0>;
1332 reg = <0 0xe6ef5000 0 0x1000>;
1342 #size-cells = <0>;
1346 #size-cells = <0>;
1361 reg = <0 0xe6f40000 0 0x84>;
1365 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1376 reg = <0 0xe6f50000 0 0x84>;
1380 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1391 reg = <0 0xe6f60000 0 0x84>;
1395 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1406 reg = <0 0xe6f70000 0 0x84>;
1410 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1421 reg = <0 0xe6f80000 0 0x84>;
1425 dmas = <&dmac0 0x28>;
1436 reg = <0 0xe6f90000 0 0x84>;
1440 dmas = <&dmac0 0x2a>;
1451 reg = <0 0xe6fa0000 0 0x84>;
1455 dmas = <&dmac0 0x2c>;
1466 reg = <0 0xe6fb0000 0 0x84>;
1470 dmas = <&dmac0 0x2e>;
1482 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1488 * clkout : #clock-cells = <0>; <&rcar_sound>;
1492 reg = <0 0xec500000 0 0x1000>, /* SCU */
1493 <0 0xec5a0000 0 0x100>, /* ADG */
1494 <0 0xec540000 0 0x1000>, /* SSIU */
1495 <0 0xec541000 0 0x280>, /* SSI */
1496 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1519 "ssi.1", "ssi.0",
1522 "src.1", "src.0",
1523 "mix.1", "mix.0",
1524 "ctu.1", "ctu.0",
1525 "dvc.0", "dvc.1",
1537 "ssi.1", "ssi.0";
1541 ctu00: ctu-0 { };
1552 dvc0: dvc-0 {
1553 dmas = <&audma0 0xbc>;
1557 dmas = <&audma0 0xbe>;
1563 mix0: mix-0 { };
1568 src0: src-0 {
1570 dmas = <&audma0 0x85>, <&audma0 0x9a>;
1575 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1580 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1585 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1590 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1595 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1600 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1605 dmas = <&audma0 0x93>, <&audma0 0xb6>;
1610 dmas = <&audma0 0x95>, <&audma0 0xb8>;
1615 dmas = <&audma0 0x97>, <&audma0 0xba>;
1621 ssi0: ssi-0 {
1623 dmas = <&audma0 0x01>, <&audma0 0x02>,
1624 <&audma0 0x15>, <&audma0 0x16>;
1629 dmas = <&audma0 0x03>, <&audma0 0x04>,
1630 <&audma0 0x49>, <&audma0 0x4a>;
1635 dmas = <&audma0 0x05>, <&audma0 0x06>,
1636 <&audma0 0x63>, <&audma0 0x64>;
1641 dmas = <&audma0 0x07>, <&audma0 0x08>,
1642 <&audma0 0x6f>, <&audma0 0x70>;
1647 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1648 <&audma0 0x71>, <&audma0 0x72>;
1653 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1654 <&audma0 0x73>, <&audma0 0x74>;
1659 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1660 <&audma0 0x75>, <&audma0 0x76>;
1665 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1666 <&audma0 0x79>, <&audma0 0x7a>;
1671 dmas = <&audma0 0x11>, <&audma0 0x12>,
1672 <&audma0 0x7b>, <&audma0 0x7c>;
1677 dmas = <&audma0 0x13>, <&audma0 0x14>,
1678 <&audma0 0x7d>, <&audma0 0x7e>;
1687 reg = <0 0xec520000 0 0x800>;
1699 reg = <0 0xec700000 0 0x10000>;
1728 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1741 reg = <0 0xee000000 0 0xc00>;
1752 reg = <0 0xee020000 0 0x400>;
1762 reg = <0 0xee080000 0 0x100>;
1774 reg = <0 0xee080100 0 0x100>;
1788 reg = <0 0xee080200 0 0x700>;
1800 reg = <0 0xee100000 0 0x2000>;
1814 reg = <0 0xee120000 0 0x2000>;
1828 reg = <0 0xee160000 0 0x2000>;
1842 reg = <0 0xee200000 0 0x200>,
1843 <0 0x08000000 0 0x04000000>,
1844 <0 0xee208000 0 0x100>;
1851 #size-cells = <0>;
1858 #address-cells = <0>;
1860 reg = <0x0 0xf1010000 0 0x1000>,
1861 <0x0 0xf1020000 0 0x20000>,
1862 <0x0 0xf1040000 0 0x20000>,
1863 <0x0 0xf1060000 0 0x20000>;
1875 reg = <0 0xfe000000 0 0x80000>;
1878 bus-range = <0x00 0xff>;
1880 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1881 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1882 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1883 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1885 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
1890 interrupt-map-mask = <0 0 0 0>;
1891 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1896 iommu-map = <0 &ipmmu_hc 0 1>;
1897 iommu-map-mask = <0>;
1903 reg = <0 0xfe960000 0 0x8000>;
1913 reg = <0 0xfe96f000 0 0x200>;
1922 reg = <0 0xfe9a0000 0 0x8000>;
1932 reg = <0 0xfe9af000 0 0x200>;
1941 reg = <0 0xfea20000 0 0x7000>;
1951 reg = <0 0xfea27000 0 0x200>;
1960 reg = <0 0xfea28000 0 0x7000>;
1970 reg = <0 0xfea2f000 0 0x200>;
1980 reg = <0 0xfea40000 0 0x1000>;
1989 reg = <0 0xfea50000 0 0x1000>;
1997 reg = <0 0xfeaa0000 0 0x10000>;
2006 #size-cells = <0>;
2008 port@0 {
2009 reg = <0>;
2014 #size-cells = <0>;
2018 csi40vin4: endpoint@0 {
2019 reg = <0>;
2032 reg = <0 0xfeb00000 0 0x40000>;
2036 clock-names = "du.0", "du.1";
2038 reset-names = "du.0";
2041 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2047 #size-cells = <0>;
2049 port@0 {
2050 reg = <0>;
2071 reg = <0 0xfeb90000 0 0x20>;
2081 #size-cells = <0>;
2083 port@0 {
2084 reg = <0>;
2098 reg = <0 0xfeb90100 0 0x20>;
2106 #size-cells = <0>;
2108 port@0 {
2109 reg = <0>;
2123 reg = <0 0xfff00044 0 4>;
2130 polling-delay = <0>;
2137 cooling-device = <&a53_0 0 2>;