Lines Matching +full:1 +full:e40000
169 cluster1_c4: cpu-sleep-1 {
213 mc_virt: interconnect-1 {
390 dsm_partition_1_mem: dsm-partition-1@84a00000 {
540 #clock-cells = <1>;
541 #reset-cells = <1>;
542 #power-domain-cells = <1>;
608 <&gpi_dma2 1 0 QCOM_GPI_I2C>;
615 #address-cells = <1>;
641 <&gpi_dma2 1 0 QCOM_GPI_SPI>;
648 #address-cells = <1>;
673 dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
674 <&gpi_dma2 1 1 QCOM_GPI_I2C>;
681 #address-cells = <1>;
706 dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
707 <&gpi_dma2 1 1 QCOM_GPI_SPI>;
714 #address-cells = <1>;
740 <&gpi_dma2 1 2 QCOM_GPI_I2C>;
747 #address-cells = <1>;
773 <&gpi_dma2 1 2 QCOM_GPI_SPI>;
780 #address-cells = <1>;
806 <&gpi_dma2 1 3 QCOM_GPI_I2C>;
813 #address-cells = <1>;
839 <&gpi_dma2 1 3 QCOM_GPI_SPI>;
846 #address-cells = <1>;
872 <&gpi_dma2 1 4 QCOM_GPI_I2C>;
879 #address-cells = <1>;
905 <&gpi_dma2 1 4 QCOM_GPI_SPI>;
912 #address-cells = <1>;
938 <&gpi_dma2 1 5 QCOM_GPI_I2C>;
945 #address-cells = <1>;
971 <&gpi_dma2 1 5 QCOM_GPI_SPI>;
978 #address-cells = <1>;
1026 <&gpi_dma2 1 7 QCOM_GPI_I2C>;
1033 #address-cells = <1>;
1059 <&gpi_dma2 1 7 QCOM_GPI_SPI>;
1066 #address-cells = <1>;
1107 #address-cells = <1>;
1134 #address-cells = <1>;
1161 #address-cells = <1>;
1188 #address-cells = <1>;
1215 #address-cells = <1>;
1242 #address-cells = <1>;
1269 #address-cells = <1>;
1296 #address-cells = <1>;
1323 #address-cells = <1>;
1350 #address-cells = <1>;
1420 <&gpi_dma1 1 0 QCOM_GPI_I2C>;
1427 #address-cells = <1>;
1453 <&gpi_dma1 1 0 QCOM_GPI_SPI>;
1460 #address-cells = <1>;
1485 dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
1486 <&gpi_dma1 1 1 QCOM_GPI_I2C>;
1493 #address-cells = <1>;
1518 dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
1519 <&gpi_dma1 1 1 QCOM_GPI_SPI>;
1526 #address-cells = <1>;
1552 <&gpi_dma1 1 2 QCOM_GPI_I2C>;
1559 #address-cells = <1>;
1585 <&gpi_dma1 1 2 QCOM_GPI_SPI>;
1592 #address-cells = <1>;
1618 <&gpi_dma1 1 3 QCOM_GPI_I2C>;
1625 #address-cells = <1>;
1651 <&gpi_dma1 1 3 QCOM_GPI_SPI>;
1658 #address-cells = <1>;
1684 <&gpi_dma1 1 4 QCOM_GPI_I2C>;
1691 #address-cells = <1>;
1717 <&gpi_dma1 1 4 QCOM_GPI_SPI>;
1724 #address-cells = <1>;
1750 <&gpi_dma1 1 5 QCOM_GPI_I2C>;
1757 #address-cells = <1>;
1783 <&gpi_dma1 1 5 QCOM_GPI_SPI>;
1790 #address-cells = <1>;
1816 <&gpi_dma1 1 6 QCOM_GPI_I2C>;
1823 #address-cells = <1>;
1849 <&gpi_dma1 1 6 QCOM_GPI_SPI>;
1856 #address-cells = <1>;
1942 tcsr_mutex: hwlock@1f40000 {
1945 #hwlock-cells = <1>;
1948 lpass_ag_noc: interconnect@7e40000 {
1994 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
2519 #clock-cells = <1>;
2520 #reset-cells = <1>;
2642 #global-interrupts = <1>;
2657 #redistributor-regions = <1>;
2669 #msi-cells = <1>;
2679 "drv-1",
2704 #clock-cells = <1>;
2712 #power-domain-cells = <1>;
2810 #size-cells = <1>;
2828 frame-number = <1>;