Lines Matching +full:1 +full:a100000
148 clocks = <&cpufreq_hw 1>;
155 qcom,freq-domain = <&cpufreq_hw 1>;
171 clocks = <&cpufreq_hw 1>;
178 qcom,freq-domain = <&cpufreq_hw 1>;
194 clocks = <&cpufreq_hw 1>;
201 qcom,freq-domain = <&cpufreq_hw 1>;
217 clocks = <&cpufreq_hw 1>;
224 qcom,freq-domain = <&cpufreq_hw 1>;
285 big_cpu_sleep_0: cpu-sleep-1-0 {
698 pil_nsp0_mem: cdsp0-region@8a100000 {
728 #qcom,smem-state-cells = <1>;
752 #qcom,smem-state-cells = <1>;
776 #qcom,smem-state-cells = <1>;
826 #clock-cells = <1>;
827 #reset-cells = <1>;
828 #power-domain-cells = <1>;
877 #address-cells = <1>;
878 #size-cells = <1>;
903 #address-cells = <1>;
919 #address-cells = <1>;
935 #address-cells = <1>;
951 #address-cells = <1>;
981 #address-cells = <1>;
997 #address-cells = <1>;
1031 #address-cells = <1>;
1047 #address-cells = <1>;
1063 #address-cells = <1>;
1079 #address-cells = <1>;
1098 #address-cells = <1>;
1111 #address-cells = <1>;
1127 #address-cells = <1>;
1143 #address-cells = <1>;
1159 #address-cells = <1>;
1175 #address-cells = <1>;
1206 #address-cells = <1>;
1222 #address-cells = <1>;
1238 #address-cells = <1>;
1254 #address-cells = <1>;
1270 #address-cells = <1>;
1286 #address-cells = <1>;
1316 #address-cells = <1>;
1332 #address-cells = <1>;
1351 #address-cells = <1>;
1364 #address-cells = <1>;
1380 #address-cells = <1>;
1396 #address-cells = <1>;
1412 #address-cells = <1>;
1428 #address-cells = <1>;
1444 #address-cells = <1>;
1460 #address-cells = <1>;
1491 #address-cells = <1>;
1507 #address-cells = <1>;
1523 #address-cells = <1>;
1539 #address-cells = <1>;
1555 #address-cells = <1>;
1571 #address-cells = <1>;
1587 #address-cells = <1>;
1603 #address-cells = <1>;
1619 #address-cells = <1>;
1635 #address-cells = <1>;
1651 #address-cells = <1>;
1667 #address-cells = <1>;
1683 #address-cells = <1>;
1699 #address-cells = <1>;
1715 #address-cells = <1>;
1731 #address-cells = <1>;
1752 pcie4: pcie@1c00000 {
1771 num-lanes = <1>;
1781 #interrupt-cells = <1>;
1783 interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1836 pcie4_phy: phy@1c06000 {
1865 pcie3b: pcie@1c08000 {
1894 #interrupt-cells = <1>;
1896 interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 526 IRQ_TYPE_LEVEL_HIGH>,
1947 pcie3b_phy: phy@1c0e000 {
1976 pcie3a: pcie@1c10000 {
2005 #interrupt-cells = <1>;
2007 interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>,
2058 pcie3a_phy: phy@1c14000 {
2080 qcom,4ln-config-sel = <&tcsr 0xa044 1>;
2090 pcie2b: pcie@1c18000 {
2119 #interrupt-cells = <1>;
2121 interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
2172 pcie2b_phy: phy@1c1e000 {
2201 pcie2a: pcie@1c20000 {
2230 #interrupt-cells = <1>;
2232 interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>,
2283 pcie2a_phy: phy@1c24000 {
2315 ufs_mem_hc: ufshc@1d84000 {
2323 #reset-cells = <1>;
2360 ufs_mem_phy: phy@1d87000 {
2381 ufs_card_hc: ufshc@1da4000 {
2389 #reset-cells = <1>;
2425 ufs_card_phy: phy@1da7000 {
2446 tcsr_mutex: hwlock@1f40000 {
2449 #hwlock-cells = <1>;
2452 tcsr: syscon@1fc0000 {
2467 iommus = <&gpu_smmu 0 0xc00>, <&gpu_smmu 1 0xc00>;
2586 #clock-cells = <1>;
2587 #reset-cells = <1>;
2588 #power-domain-cells = <1>;
2750 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
2788 #address-cells = <1>;
2791 q6apm: service@1 {
2804 #sound-dai-cells = <1>;
2837 #sound-dai-cells = <1>;
2868 #sound-dai-cells = <1>;
2893 #sound-dai-cells = <1>;
2913 #sound-dai-cells = <1>;
2944 #sound-dai-cells = <1>;
2954 #clock-cells = <1>;
2955 #reset-cells = <1>;
2970 #sound-dai-cells = <1>;
3002 #sound-dai-cells = <1>;
3026 slew-rate = <1>;
3034 slew-rate = <1>;
3044 slew-rate = <1>;
3052 slew-rate = <1>;
3130 slew-rate = <1>;
3138 slew-rate = <1>;
3148 slew-rate = <1>;
3156 slew-rate = <1>;
3165 #clock-cells = <1>;
3166 #reset-cells = <1>;
3228 #clock-cells = <1>;
3229 #phy-cells = <1>;
3234 #address-cells = <1>;
3243 port@1 {
3244 reg = <1>;
3289 #clock-cells = <1>;
3290 #phy-cells = <1>;
3295 #address-cells = <1>;
3304 port@1 {
3305 reg = <1>;
3332 #clock-cells = <1>;
3350 #clock-cells = <1>;
3372 opp-1 {
3426 opp-1 {
3535 "usb2-1", "usb3-1",
3602 #address-cells = <1>;
3612 port@1 {
3613 reg = <1>;
3681 #address-cells = <1>;
3691 port@1 {
3692 reg = <1>;
3720 pinctrl-1 = <&cci0_sleep>;
3723 #address-cells = <1>;
3731 #address-cells = <1>;
3735 cci0_i2c1: i2c-bus@1 {
3736 reg = <1>;
3738 #address-cells = <1>;
3761 pinctrl-1 = <&cci1_sleep>;
3764 #address-cells = <1>;
3772 #address-cells = <1>;
3776 cci1_i2c1: i2c-bus@1 {
3777 reg = <1>;
3779 #address-cells = <1>;
3801 pinctrl-1 = <&cci2_sleep>;
3804 #address-cells = <1>;
3812 #address-cells = <1>;
3816 cci2_i2c1: i2c-bus@1 {
3817 reg = <1>;
3819 #address-cells = <1>;
3842 pinctrl-1 = <&cci3_sleep>;
3845 #address-cells = <1>;
3853 #address-cells = <1>;
3857 cci3_i2c1: i2c-bus@1 {
3858 reg = <1>;
3860 #address-cells = <1>;
4071 #address-cells = <1>;
4076 #address-cells = <1>;
4080 port@1 {
4081 reg = <1>;
4082 #address-cells = <1>;
4088 #address-cells = <1>;
4094 #address-cells = <1>;
4109 #clock-cells = <1>;
4110 #reset-cells = <1>;
4111 #power-domain-cells = <1>;
4134 #interrupt-cells = <1>;
4168 #address-cells = <1>;
4264 #address-cells = <1>;
4275 port@1 {
4276 reg = <1>;
4342 #address-cells = <1>;
4353 port@1 {
4354 reg = <1>;
4410 assigned-clock-parents = <&mdss0_dp2_phy 0>, <&mdss0_dp2_phy 1>;
4418 #address-cells = <1>;
4428 port@1 {
4429 reg = <1>;
4482 assigned-clock-parents = <&mdss0_dp3_phy 0>, <&mdss0_dp3_phy 1>;
4490 #address-cells = <1>;
4500 port@1 {
4501 reg = <1>;
4543 #clock-cells = <1>;
4561 #clock-cells = <1>;
4579 <&mdss0_dp2_phy 1>,
4581 <&mdss0_dp3_phy 1>,
4588 #clock-cells = <1>;
4589 #power-domain-cells = <1>;
4590 #reset-cells = <1>;
4600 <54 263 1>,
4606 <69 86 1>,
4609 <159 638 1>,
4611 <168 801 1>,
4614 <201 449 1>,
4615 <202 89 1>,
4616 <203 451 1>,
4617 <204 462 1>,
4618 <205 264 1>,
4619 <206 579 1>,
4620 <207 653 1>,
4621 <208 656 1>,
4622 <209 659 1>,
4623 <210 122 1>,
4624 <211 699 1>,
4625 <212 705 1>,
4626 <213 450 1>,
4627 <214 643 1>,
4632 <232 269 1>,
4633 <233 377 1>,
4634 <234 372 1>,
4635 <235 138 1>,
4636 <236 857 1>,
4637 <237 860 1>,
4638 <238 137 1>,
4639 <239 668 1>,
4640 <240 366 1>,
4641 <241 949 1>,
4643 <247 769 1>,
4644 <248 768 1>,
4645 <249 663 1>,
4647 <252 798 1>,
4648 <253 765 1>,
4649 <254 763 1>,
4650 <255 454 1>,
4651 <258 139 1>,
4668 #thermal-sensor-cells = <1>;
4679 #thermal-sensor-cells = <1>;
4690 #thermal-sensor-cells = <1>;
4708 #thermal-sensor-cells = <1>;
4735 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
5075 #redistributor-regions = <1>;
5086 #msi-cells = <1>;
5100 #address-cells = <1>;
5101 #size-cells = <1>;
5113 frame-number = <1>;
5160 reg-names = "drv-0", "drv-1", "drv-2";
5167 <WAKE_TCS 3>, <CONTROL_TCS 1>;
5177 #clock-cells = <1>;
5184 #power-domain-cells = <1>;
5240 #interconnect-cells = <1>;
5252 "dcvsh-irq-1";
5257 #freq-domain-cells = <1>;
5258 #clock-cells = <1>;
5261 remoteproc_nsp0: remoteproc@1b300000 {
5267 <&smp2p_nsp0_in 1 IRQ_TYPE_EDGE_RISING>,
5302 #address-cells = <1>;
5305 compute-cb@1 {
5307 reg = <1>;
5398 <&smp2p_nsp1_in 1 IRQ_TYPE_EDGE_RISING>,
5452 #interrupt-cells = <1>;
5486 #address-cells = <1>;
5571 assigned-clock-parents = <&mdss1_dp0_phy 0>, <&mdss1_dp0_phy 1>;
5579 #address-cells = <1>;
5589 port@1 {
5590 reg = <1>;
5643 assigned-clock-parents = <&mdss1_dp1_phy 0>, <&mdss1_dp1_phy 1>;
5651 #address-cells = <1>;
5661 port@1 {
5662 reg = <1>;
5715 assigned-clock-parents = <&mdss1_dp2_phy 0>, <&mdss1_dp2_phy 1>;
5723 #address-cells = <1>;
5733 port@1 {
5734 reg = <1>;
5787 assigned-clock-parents = <&mdss1_dp3_phy 0>, <&mdss1_dp3_phy 1>;
5795 #address-cells = <1>;
5805 port@1 {
5806 reg = <1>;
5848 #clock-cells = <1>;
5866 #clock-cells = <1>;
5880 <&mdss1_dp0_phy 1>,
5882 <&mdss1_dp1_phy 1>,
5884 <&mdss1_dp2_phy 1>,
5886 <&mdss1_dp3_phy 1>,
5893 #clock-cells = <1>;
5894 #power-domain-cells = <1>;
5895 #reset-cells = <1>;
5938 thermal-sensors = <&tsens0 1>;