Lines Matching +full:1 +full:ac00000
233 clocks = <&cpufreq_hw 1>;
244 qcom,freq-domain = <&cpufreq_hw 1>;
257 clocks = <&cpufreq_hw 1>;
268 qcom,freq-domain = <&cpufreq_hw 1>;
326 little_cpu_sleep_1: cpu-sleep-0-1 {
336 big_cpu_sleep_0: cpu-sleep-1-0 {
346 big_cpu_sleep_1: cpu-sleep-1-1 {
366 cluster_sleep_cx_ret: cluster-sleep-1 {
690 qcom,client-id = <1>;
714 #qcom,smem-state-cells = <1>;
738 #qcom,smem-state-cells = <1>;
755 qcom,remote-pid = <1>;
759 #qcom,smem-state-cells = <1>;
770 #qcom,smem-state-cells = <1>;
794 #clock-cells = <1>;
795 #reset-cells = <1>;
796 #power-domain-cells = <1>;
809 #address-cells = <1>;
810 #size-cells = <1>;
814 bits = <1 3>;
817 gpu_speed_bin: gpu-speed-bin@1d2 {
848 mmc-ddr-1_8v;
849 mmc-hs200-1_8v;
850 mmc-hs400-1_8v;
894 #address-cells = <1>;
914 #address-cells = <1>;
948 #address-cells = <1>;
968 #address-cells = <1>;
1002 #address-cells = <1>;
1038 #address-cells = <1>;
1058 #address-cells = <1>;
1092 #address-cells = <1>;
1128 #address-cells = <1>;
1148 #address-cells = <1>;
1195 #address-cells = <1>;
1215 #address-cells = <1>;
1249 #address-cells = <1>;
1285 #address-cells = <1>;
1305 #address-cells = <1>;
1339 #address-cells = <1>;
1375 #address-cells = <1>;
1395 #address-cells = <1>;
1429 #address-cells = <1>;
1449 #address-cells = <1>;
1532 ufs_mem_hc: ufshc@1d84000 {
1539 lanes-per-direction = <1>;
1540 #reset-cells = <1>;
1581 ufs_mem_phy: phy@1d87000 {
1597 ice: crypto@1d90000 {
1604 ipa: ipa@1e40000 {
1619 <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
1638 <&ipa_smp2p_out 1>;
1645 tcsr_mutex: hwlock@1f40000 {
1648 #hwlock-cells = <1>;
1651 tcsr_regs_1: syscon@1f60000 {
1656 tcsr_regs_2: syscon@1fc0000 {
2131 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2158 qcom,remote-pid = <1>;
2245 #iommu-cells = <1>;
2302 #clock-cells = <1>;
2303 #reset-cells = <1>;
2304 #power-domain-cells = <1>;
2348 #address-cells = <1>;
2376 #address-cells = <1>;
2404 #address-cells = <1>;
2414 port@1 {
2415 reg = <1>;
2481 #address-cells = <1>;
2718 #address-cells = <1>;
2728 port@1 {
2729 reg = <1>;
2850 #address-cells = <1>;
2897 #clock-cells = <1>;
2898 #phy-cells = <1>;
2917 opp-1 {
2955 opp-1 {
3140 #clock-cells = <1>;
3141 #reset-cells = <1>;
3142 #power-domain-cells = <1>;
3145 camnoc_virt: interconnect@ac00000 {
3159 #clock-cells = <1>;
3160 #reset-cells = <1>;
3161 #power-domain-cells = <1>;
3178 #interrupt-cells = <1>;
3222 #address-cells = <1>;
3288 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
3295 #address-cells = <1>;
3301 #address-cells = <1>;
3311 port@1 {
3312 reg = <1>;
3347 #clock-cells = <1>;
3390 #address-cells = <1>;
3399 port@1 {
3400 reg = <1>;
3437 <&mdss_dsi0_phy 1>,
3446 #clock-cells = <1>;
3447 #reset-cells = <1>;
3448 #power-domain-cells = <1>;
3454 qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;
3463 #reset-cells = <1>;
3474 #thermal-sensor-cells = <1>;
3485 #thermal-sensor-cells = <1>;
3491 #reset-cells = <1>;
3517 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
3530 #address-cells = <1>;
3531 #size-cells = <1>;
3545 #global-interrupts = <1>;
3644 #msi-cells = <1>;
3654 #mbox-cells = <1>;
3665 #address-cells = <1>;
3666 #size-cells = <1>;
3680 frame-number = <1>;
3727 reg-names = "drv-0", "drv-1", "drv-2";
3736 <CONTROL_TCS 1>;
3743 #clock-cells = <1>;
3748 #power-domain-cells = <1>;
3812 #interconnect-cells = <1>;
3823 #freq-domain-cells = <1>;
3824 #clock-cells = <1>;
3856 <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
3888 #address-cells = <1>;
3904 #address-cells = <1>;
3906 #sound-dai-cells = <1>;
3922 #address-cells = <1>;
3924 #sound-dai-cells = <1>;
3945 #address-cells = <1>;
3979 #clock-cells = <1>;
3980 #power-domain-cells = <1>;
4012 #sound-dai-cells = <1>;
4013 #address-cells = <1>;
4029 #clock-cells = <1>;
4030 #power-domain-cells = <1>;
4040 thermal-sensors = <&tsens0 1>;
4620 thermal-sensors = <&tsens1 1>;
4800 interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,