Lines Matching +full:1 +full:e40000
59 qcom,client-id = <1>;
154 cpu1: cpu@1 {
280 little_cpu_sleep_1: cpu-sleep-0-1 {
291 big_cpu_sleep_0: cpu-sleep-1-0 {
301 big_cpu_sleep_1: cpu-sleep-1-1 {
362 #clock-cells = <1>;
367 #power-domain-cells = <1>;
437 #qcom,smem-state-cells = <1>;
454 qcom,remote-pid = <1>;
458 #qcom,smem-state-cells = <1>;
478 #qcom,smem-state-cells = <1>;
492 thermal-sensors = <&tsens0 1>;
722 thermal-sensors = <&tsens1 1>;
806 interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
813 #address-cells = <1>;
814 #size-cells = <1>;
820 #clock-cells = <1>;
821 #reset-cells = <1>;
822 #power-domain-cells = <1>;
852 #address-cells = <1>;
853 #size-cells = <1>;
869 #thermal-sensor-cells = <1>;
880 #thermal-sensor-cells = <1>;
886 #iommu-cells = <1>;
901 #iommu-cells = <1>;
917 pcie0: pcie@1c00000 {
929 num-lanes = <1>;
937 #interrupt-cells = <1>;
941 interrupt-map = <0 0 0 1 &intc 0 0 135 IRQ_TYPE_LEVEL_HIGH>,
954 iommu-map = <0x100 &anoc1_smmu 0x1480 1>;
968 pcie_phy: phy@1c06000 {
994 ufshc: ufshc@1da4000 {
1003 #reset-cells = <1>;
1037 ufsphy: phy@1da7000 {
1055 tcsr_mutex: hwlock@1f40000 {
1058 #hwlock-cells = <1>;
1061 tcsr_regs_1: syscon@1f60000 {
1066 tcsr_regs_2: syscon@1fc0000 {
1456 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
1504 qcom,remote-pid = <1>;
1588 #iommu-cells = <1>;
1606 #clock-cells = <1>;
1607 #reset-cells = <1>;
1608 #power-domain-cells = <1>;
1624 #iommu-cells = <1>;
1650 <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
1716 #address-cells = <1>;
1746 #address-cells = <1>;
1777 #address-cells = <1>;
1788 port@1 {
1789 reg = <1>;
1967 #address-cells = <1>;
1978 port@1 {
1979 reg = <1>;
2101 etm7: etm@7e40000 {
2166 #address-cells = <1>;
2167 #size-cells = <1>;
2274 #dma-cells = <1>;
2307 pinctrl-1 = <&blsp1_i2c1_sleep>;
2311 #address-cells = <1>;
2327 pinctrl-1 = <&blsp1_i2c2_sleep>;
2331 #address-cells = <1>;
2347 pinctrl-1 = <&blsp1_i2c3_sleep>;
2351 #address-cells = <1>;
2367 pinctrl-1 = <&blsp1_i2c4_sleep>;
2371 #address-cells = <1>;
2387 pinctrl-1 = <&blsp1_i2c5_sleep>;
2391 #address-cells = <1>;
2407 pinctrl-1 = <&blsp1_i2c6_sleep>;
2411 #address-cells = <1>;
2429 #address-cells = <1>;
2447 #address-cells = <1>;
2465 #address-cells = <1>;
2483 #address-cells = <1>;
2501 #address-cells = <1>;
2519 #address-cells = <1>;
2529 #dma-cells = <1>;
2558 pinctrl-1 = <&blsp2_i2c1_sleep>;
2562 #address-cells = <1>;
2578 pinctrl-1 = <&blsp2_i2c2_sleep>;
2582 #address-cells = <1>;
2598 pinctrl-1 = <&blsp2_i2c3_sleep>;
2602 #address-cells = <1>;
2618 pinctrl-1 = <&blsp2_i2c4_sleep>;
2622 #address-cells = <1>;
2638 pinctrl-1 = <&blsp2_i2c5_sleep>;
2642 #address-cells = <1>;
2658 pinctrl-1 = <&blsp2_i2c6_sleep>;
2662 #address-cells = <1>;
2680 #address-cells = <1>;
2698 #address-cells = <1>;
2716 #address-cells = <1>;
2734 #address-cells = <1>;
2752 #address-cells = <1>;
2770 #address-cells = <1>;
2776 #clock-cells = <1>;
2777 #reset-cells = <1>;
2778 #power-domain-cells = <1>;
2793 <&mdss_dsi0_phy 1>,
2795 <&mdss_dsi1_phy 1>,
2810 #interrupt-cells = <1>;
2822 #address-cells = <1>;
2823 #size-cells = <1>;
2884 #address-cells = <1>;
2895 port@1 {
2896 reg = <1>;
2936 <&mdss_dsi0_phy 1>;
2944 #address-cells = <1>;
2950 #address-cells = <1>;
2961 port@1 {
2962 reg = <1>;
2983 #clock-cells = <1>;
3012 <&mdss_dsi1_phy 1>;
3020 #address-cells = <1>;
3026 #address-cells = <1>;
3037 port@1 {
3038 reg = <1>;
3060 #clock-cells = <1>;
3097 #sound-dai-cells = <1>;
3102 pinctrl-1 = <&hdmi_hpd_sleep>,
3110 #address-cells = <1>;
3120 port@1 {
3121 reg = <1>;
3208 #iommu-cells = <1>;
3249 <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
3281 #mbox-cells = <1>;
3285 #address-cells = <1>;
3286 #size-cells = <1>;
3300 frame-number = <1>;
3347 #address-cells = <1>;
3348 #size-cells = <1>;
3351 #redistributor-regions = <1>;