Lines Matching refs:gcc
9 #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
161 clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>;
163 resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
185 clocks = <&gcc GCC_PRNG_AHB_CLK>;
207 gcc: clock-controller@1800000 { label
208 compatible = "qcom,ipq5332-gcc";
239 clocks = <&gcc GCC_SDCC1_AHB_CLK>,
240 <&gcc GCC_SDCC1_APPS_CLK>,
250 clocks = <&gcc GCC_BLSP1_AHB_CLK>;
260 clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
261 <&gcc GCC_BLSP1_AHB_CLK>;
270 clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
271 <&gcc GCC_BLSP1_AHB_CLK>;
284 clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
285 <&gcc GCC_BLSP1_AHB_CLK>;
298 clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
299 <&gcc GCC_BLSP1_AHB_CLK>;
312 clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
313 <&gcc GCC_BLSP1_AHB_CLK>;
331 clocks = <&gcc GCC_USB0_MASTER_CLK>,
332 <&gcc GCC_USB0_SLEEP_CLK>,
333 <&gcc GCC_USB0_MOCK_UTMI_CLK>;
338 resets = <&gcc GCC_USB_BCR>;
345 interconnects = <&gcc MASTER_SNOC_USB &gcc SLAVE_SNOC_USB>,
346 <&gcc MASTER_SNOC_USB &gcc SLAVE_SNOC_USB>;
354 clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
412 clocks = <&a53pll>, <&xo_board>, <&gcc GPLL0>;