Lines Matching full:topckgen

58 				 <&topckgen CLK_TOP_MAINPLL_D2>;
71 				 <&topckgen CLK_TOP_MAINPLL_D2>;
84 				 <&topckgen CLK_TOP_MAINPLL_D2>;
97 				 <&topckgen CLK_TOP_MAINPLL_D2>;
182 		topckgen: topckgen@10000000 {  label
183 			compatible = "mediatek,mt8516-topckgen", "syscon";
218 			clocks = <&topckgen CLK_TOP_CLK26M_D2>,
219 				 <&topckgen CLK_TOP_APXGPT>;
262 			clocks = <&topckgen CLK_TOP_PMICWRAP_26M>,
263 				 <&topckgen CLK_TOP_PMICWRAP_AP>;
305 			clocks = <&topckgen CLK_TOP_APDMA>;
315 			clocks = <&topckgen CLK_TOP_UART0_SEL>,
316 				 <&topckgen CLK_TOP_UART0>;
329 			clocks = <&topckgen CLK_TOP_UART1_SEL>,
330 				 <&topckgen CLK_TOP_UART1>;
343 			clocks = <&topckgen CLK_TOP_UART2_SEL>,
344 				 <&topckgen CLK_TOP_UART2>;
359 			clocks = <&topckgen CLK_TOP_I2C0>,
360 				 <&topckgen CLK_TOP_APDMA>;
374 			clocks = <&topckgen CLK_TOP_I2C1>,
375 				 <&topckgen CLK_TOP_APDMA>;
389 			clocks = <&topckgen CLK_TOP_I2C2>,
390 				 <&topckgen CLK_TOP_APDMA>;
404 			clocks = <&topckgen CLK_TOP_UNIVPLL_D12>,
405 				 <&topckgen CLK_TOP_SPI_SEL>,
406 				 <&topckgen CLK_TOP_SPI>;
415 			clocks = <&topckgen CLK_TOP_MSDC0>,
416 				 <&topckgen CLK_TOP_AHB_INFRA_SEL>,
417 				 <&topckgen CLK_TOP_MSDC0_INFRA>;
426 			clocks = <&topckgen CLK_TOP_MSDC1>,
427 				 <&topckgen CLK_TOP_AHB_INFRA_SEL>,
428 				 <&topckgen CLK_TOP_MSDC1_INFRA>;
437 			clocks = <&topckgen CLK_TOP_MSDC2>,
438 				 <&topckgen CLK_TOP_RG_MSDC2>,
439 				 <&topckgen CLK_TOP_MSDC2_INFRA>;
449 			clocks = <&topckgen CLK_TOP_RG_ETH>,
450 				 <&topckgen CLK_TOP_66M_ETH>,
451 				 <&topckgen CLK_TOP_133M_ETH>;
460 			clocks = <&topckgen CLK_TOP_TRNG>;
469 			clocks = <&topckgen CLK_TOP_PWM>,
470 				 <&topckgen CLK_TOP_PWM_B>,
471 				 <&topckgen CLK_TOP_PWM1_FB>,
472 				 <&topckgen CLK_TOP_PWM2_FB>,
473 				 <&topckgen CLK_TOP_PWM3_FB>,
474 				 <&topckgen CLK_TOP_PWM4_FB>,
475 				 <&topckgen CLK_TOP_PWM5_FB>;
486 			clocks = <&topckgen CLK_TOP_USB>,
487 				 <&topckgen CLK_TOP_USBIF>,
488 				 <&topckgen CLK_TOP_USB_1P>;
499 			clocks = <&topckgen CLK_TOP_USB>,
500 				 <&topckgen CLK_TOP_USBIF>,
501 				 <&topckgen CLK_TOP_USB_1P>;
518 				clocks = <&topckgen CLK_TOP_USB_PHY48M>;
525 				clocks = <&topckgen CLK_TOP_USB_PHY48M>;
535 			clocks = <&topckgen CLK_TOP_AUX_ADC>;