Lines Matching +full:cros +full:- +full:ec +full:- +full:spi
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
23 backlight_lcd0: backlight-lcd0 {
24 compatible = "pwm-backlight";
25 brightness-levels = <0 1023>;
26 default-brightness-level = <576>;
27 enable-gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
28 num-interpolated-steps = <1023>;
29 power-supply = <&ppvar_sys>;
34 stdout-path = "serial0:115200n8";
37 dmic-codec {
38 compatible = "dmic-codec";
39 num-channels = <2>;
40 wakeup-delay-ms = <100>;
50 pp1800_ldo_z1: regulator-pp1800-ldo-z1 {
51 compatible = "regulator-fixed";
52 regulator-name = "pp1800_ldo_z1";
54 regulator-always-on;
55 regulator-boot-on;
56 regulator-min-microvolt = <1800000>;
57 regulator-max-microvolt = <1800000>;
58 vin-supply = <&pp3300_z1>;
62 pp3300_s3: regulator-pp3300-s3 {
63 compatible = "regulator-fixed";
64 regulator-name = "pp3300_s3";
66 regulator-always-on;
67 regulator-boot-on;
68 regulator-min-microvolt = <3300000>;
69 regulator-max-microvolt = <3300000>;
70 vin-supply = <&pp3300_z1>;
74 pp3300_z1: regulator-pp3300-z1 {
75 compatible = "regulator-fixed";
76 regulator-name = "pp3300_z1";
78 regulator-always-on;
79 regulator-boot-on;
80 regulator-min-microvolt = <3300000>;
81 regulator-max-microvolt = <3300000>;
82 vin-supply = <&ppvar_sys>;
85 pp3300_wlan: regulator-pp3300-wlan {
86 compatible = "regulator-fixed";
87 regulator-name = "pp3300_wlan";
88 regulator-always-on;
89 regulator-min-microvolt = <3300000>;
90 regulator-max-microvolt = <3300000>;
91 enable-active-high;
93 pinctrl-0 = <&wlan_en>;
94 pinctrl-names = "default";
95 vin-supply = <&pp3300_z1>;
99 pp4200_s5: regulator-pp4200-s5 {
100 compatible = "regulator-fixed";
101 regulator-name = "pp4200_s5";
102 /* controlled by EC */
103 regulator-always-on;
104 regulator-boot-on;
105 regulator-min-microvolt = <4200000>;
106 regulator-max-microvolt = <4200000>;
107 vin-supply = <&ppvar_sys>;
111 pp5000_z1: regulator-pp5000-z1 {
112 compatible = "regulator-fixed";
113 regulator-name = "pp5000_z1";
114 /* controlled by EC */
115 regulator-always-on;
116 regulator-boot-on;
117 regulator-min-microvolt = <5000000>;
118 regulator-max-microvolt = <5000000>;
119 vin-supply = <&ppvar_sys>;
122 pp5000_usb_vbus: regulator-pp5000-usb-vbus {
123 compatible = "regulator-fixed";
124 regulator-name = "pp5000_usb_vbus";
125 regulator-min-microvolt = <5000000>;
126 regulator-max-microvolt = <5000000>;
127 enable-active-high;
129 vin-supply = <&pp5000_z1>;
132 /* system wide semi-regulated power rail from battery or USB */
133 ppvar_sys: regulator-ppvar-sys {
134 compatible = "regulator-fixed";
135 regulator-name = "ppvar_sys";
136 regulator-always-on;
137 regulator-boot-on;
140 ppvar_mipi_disp_avdd: regulator-ppvar-mipi-disp-avdd {
141 compatible = "regulator-fixed";
142 regulator-name = "ppvar_mipi_disp_avdd";
143 enable-active-high;
145 pinctrl-names = "default";
146 pinctrl-0 = <&mipi_disp_avdd_en>;
147 vin-supply = <&pp5000_z1>;
150 ppvar_mipi_disp_avee: regulator-ppvar-mipi-disp-avee {
151 compatible = "regulator-fixed";
152 regulator-name = "ppvar_mipi_disp_avee";
153 regulator-enable-ramp-delay = <10000>;
154 enable-active-high;
156 pinctrl-names = "default";
157 pinctrl-0 = <&mipi_disp_avee_en>;
158 vin-supply = <&pp5000_z1>;
161 reserved_memory: reserved-memory {
162 #address-cells = <2>;
163 #size-cells = <2>;
167 compatible = "shared-dma-pool";
172 compatible = "shared-dma-pool";
174 no-map;
178 compatible = "shared-dma-pool";
180 no-map;
184 compatible = "shared-dma-pool";
186 no-map;
192 memory-region = <&adsp_dma_mem>, <&adsp_mem>;
193 pinctrl-names = "default";
194 pinctrl-0 = <&adsp_uart_pins>;
199 memory-region = <&afe_dma_mem>;
200 mediatek,etdm-out1-cowork-source = <0>; /* in1 */
201 mediatek,etdm-in2-cowork-source = <3>; /* out2 */
210 domain-supply = <&mt6359_vproc1_buck_reg>;
255 #address-cells = <1>;
256 #size-cells = <0>;
262 enable-gpios = <&pio 25 GPIO_ACTIVE_HIGH>;
263 pinctrl-names = "default";
264 pinctrl-0 = <&mipi_dsi_pins>;
267 avdd-supply = <&ppvar_mipi_disp_avdd>;
268 avee-supply = <&ppvar_mipi_disp_avee>;
269 pp1800-supply = <&mt6359_vm18_ldo_reg>;
276 remote-endpoint = <&dsi_out>;
283 remote-endpoint = <&dsi_panel_in>;
289 pinctrl-names = "default";
290 pinctrl-0 = <&disp_pwm0_pins>;
295 pinctrl-names = "default";
296 pinctrl-0 = <&disp_pwm1_pins>;
304 remote-endpoint = <&dptx_in>;
310 pinctrl-names = "default";
311 pinctrl-0 = <&dp_tx_hpd>;
312 #sound-dai-cells = <0>;
316 #address-cells = <1>;
317 #size-cells = <0>;
322 remote-endpoint = <&dp_intf1_out>;
329 data-lanes = <0 1 2 3>;
336 mali-supply = <&mt6359_vproc2_buck_reg>;
341 pinctrl-names = "default";
342 pinctrl-0 = <&i2c0_pins>;
343 clock-frequency = <400000>;
348 pinctrl-names = "default";
349 pinctrl-0 = <&i2c1_pins>;
350 clock-frequency = <400000>;
356 interrupts-extended = <&pio 0 IRQ_TYPE_EDGE_RISING>;
357 pinctrl-names = "default";
358 pinctrl-0 = <&gsc_int>;
363 pinctrl-names = "default";
364 pinctrl-0 = <&i2c2_pins>;
365 clock-frequency = <400000>;
370 pinctrl-names = "default";
371 pinctrl-0 = <&i2c3_pins>;
372 clock-frequency = <400000>;
377 pinctrl-names = "default";
378 pinctrl-0 = <&i2c4_pins>;
379 clock-frequency = <400000>;
384 pinctrl-names = "default";
385 pinctrl-0 = <&i2c5_pins>;
386 clock-frequency = <400000>;
391 pinctrl-names = "default";
392 pinctrl-0 = <&i2c6_pins>;
393 clock-frequency = <400000>;
398 domain-supply = <&mt6359_vproc2_buck_reg>;
402 domain-supply = <&mt6359_vsram_others_ldo_reg>;
410 bus-width = <8>;
411 cap-mmc-highspeed;
412 cap-mmc-hw-reset;
413 hs400-ds-delay = <0x1481b>;
414 max-frequency = <200000000>;
415 mmc-hs200-1_8v;
416 mmc-hs400-1_8v;
417 mmc-hs400-enhanced-strobe;
418 no-sd;
419 no-sdio;
420 non-removable;
421 pinctrl-names = "default", "state_uhs";
422 pinctrl-0 = <&mmc0_pins_default>;
423 pinctrl-1 = <&mmc0_pins_uhs>;
424 supports-cqe;
425 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
426 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
431 mediatek,dmic-mode = <1>; /* one-wire */
432 mediatek,mic-type-0 = <2>; /* DMIC */
433 mediatek,mic-type-2 = <2>; /* DMIC */
437 regulator-always-on;
441 regulator-always-on;
445 regulator-min-microvolt = <550000>;
446 regulator-max-microvolt = <550000>;
447 regulator-always-on;
451 /delete-property/ regulator-always-on;
455 /delete-property/ regulator-always-on;
459 regulator-min-microvolt = <775000>;
460 regulator-max-microvolt = <775000>;
464 regulator-max-microvolt = <3100000>;
470 * "ppvar_dvdd_vgpu" here to match mtk-regulator-coupler requirements.
472 regulator-name = "ppvar_dvdd_vgpu";
473 regulator-min-microvolt = <550000>;
474 regulator-max-microvolt = <800000>;
475 regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>;
476 regulator-coupled-max-spread = <6250>;
480 regulator-always-on;
484 regulator-always-on;
488 regulator-min-microvolt = <800000>;
489 regulator-max-microvolt = <800000>;
493 regulator-name = "pp0850_dvdd_sram_gpu";
494 regulator-min-microvolt = <750000>;
495 regulator-max-microvolt = <800000>;
496 regulator-coupled-with = <&mt6359_vproc2_buck_reg>;
497 regulator-coupled-max-spread = <6250>;
501 regulator-always-on;
505 pinctrl-names = "default";
506 pinctrl-0 = <&nor_pins>;
510 compatible = "jedec,spi-nor";
512 spi-max-frequency = <52000000>;
517 pinctrl-names = "default";
518 pinctrl-0 = <&pcie_pins>;
527 gpio-line-names =
706 adsp_uart_pins: adsp-uart-pins {
707 pins-bus {
713 aud_etdm_hp_on: aud-etdm-hp-on-pins {
714 pins-bus {
722 aud_etdm_hp_off: aud-etdm-hp-off-pins {
723 pins-bus {
728 bias-pull-down;
729 input-enable;
733 aud_etdm_spk_on: aud-etdm-spk-on-pins {
734 pins-bus {
739 drive-strength = <8>;
743 aud_etdm_spk_off: aud-etdm-spk-off-pins {
744 pins-bus {
749 bias-pull-down;
750 input-enable;
754 aud_mtkaif_on: aud-mtkaif-on-pins {
755 pins-bus {
765 aud_mtkaif_off: aud-mtkaif-off-pins {
766 pins-bus {
773 bias-pull-down;
774 input-enable;
778 cros_ec_int: cros-ec-int-pins {
779 pins-ec-ap-int-odl {
781 input-enable;
785 disp_pwm0_pins: disp-pwm0-pins {
786 pins-disp-pwm0 {
788 output-high;
792 disp_pwm1_pins: disp-pwm1-pins {
793 pins-disp-pwm1 {
795 output-high;
799 dp_tx_hpd: dp-tx-hpd-pins {
800 pins-dp-tx-hpd {
805 gsc_int: gsc-int-pins {
806 pins-gsc-ap-int-odl {
808 input-enable;
812 i2c0_pins: i2c0-pins {
813 pins-bus {
819 i2c1_pins: i2c1-pins {
820 pins-bus {
826 i2c2_pins: i2c2-pins {
827 pins-bus {
830 bias-disable;
831 drive-strength = <12>;
835 i2c3_pins: i2c3-pins {
836 pins-bus {
842 i2c4_pins: i2c4-pins {
843 pins-bus {
849 i2c5_pins: i2c5-pins {
850 pins-bus {
856 i2c6_pins: i2c6-pins {
857 pins-bus {
863 mipi_disp_avdd_en: mipi-disp-avdd-en-pins {
864 pins-en-ppvar-mipi-disp {
866 output-low;
870 mipi_disp_avee_en: mipi-disp-avee-en-pins {
871 pins-en-ppvar-mipi-disp-150ma {
873 output-low;
877 mipi_dsi_pins: mipi-dsi-pins {
878 pins-bus {
881 output-low;
885 mmc0_pins_default: mmc0-default-pins {
886 pins-bus {
896 input-enable;
897 drive-strength = <6>;
898 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
901 pins-clk {
903 drive-strength = <6>;
904 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
907 pins-rst {
909 drive-strength = <6>;
910 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
914 mmc0_pins_uhs: mmc0-uhs-pins {
915 pins-bus {
925 input-enable;
926 drive-strength = <8>;
927 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
930 pins-clk {
932 drive-strength = <8>;
933 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
936 pins-ds {
938 drive-strength = <8>;
939 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
942 pins-rst {
944 drive-strength = <8>;
945 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
949 nor_pins: nor-default-pins {
950 pins-clk {
954 bias-pull-down;
957 pins-cs {
959 bias-pull-up;
963 pcie_pins: pcie-default-pins {
964 pins-bus {
971 spi0_pins: spi0-pins {
972 pins-bus {
977 bias-disable;
981 spi1_pins_default: spi1-default-pins {
982 pins-bus {
987 bias-disable;
991 spi1_pins_sleep: spi1-sleep-pins {
992 pins-bus {
997 bias-pull-down;
998 input-enable;
1002 spi2_pins: spi2-pins {
1003 pins-bus {
1008 bias-disable;
1012 uart0_pins: uart0-pins {
1013 pins-bus {
1016 bias-pull-up;
1020 wlan_en: wlan-en-pins {
1021 pins-en-pp3300-wlan {
1023 output-low;
1029 interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
1033 pinctrl-names = "aud_etdm_hp_on", "aud_etdm_hp_off",
1036 pinctrl-0 = <&aud_etdm_hp_on>;
1037 pinctrl-1 = <&aud_etdm_hp_off>;
1038 pinctrl-2 = <&aud_etdm_spk_on>;
1039 pinctrl-3 = <&aud_etdm_spk_off>;
1040 pinctrl-4 = <&aud_mtkaif_on>;
1041 pinctrl-5 = <&aud_mtkaif_off>;
1043 /* The audio-routing is defined in each board dts */
1049 pinctrl-names = "default";
1050 pinctrl-0 = <&spi0_pins>;
1053 cros_ec: ec@0 {
1054 compatible = "google,cros-ec-spi";
1056 interrupts-extended = <&pio 149 IRQ_TYPE_LEVEL_LOW>;
1057 pinctrl-names = "default";
1058 pinctrl-0 = <&cros_ec_int>;
1059 spi-max-frequency = <3000000>;
1061 i2c_tunnel: i2c-tunnel {
1062 compatible = "google,cros-ec-i2c-tunnel";
1063 google,remote-bus = <1>;
1064 #address-cells = <1>;
1065 #size-cells = <0>;
1069 compatible = "google,cros-cbas";
1075 pinctrl-names = "default", "sleep";
1076 pinctrl-0 = <&spi1_pins_default>;
1077 pinctrl-1 = <&spi1_pins_sleep>;
1082 pinctrl-names = "default";
1083 pinctrl-0 = <&spi2_pins>;
1088 pinctrl-names = "default";
1089 pinctrl-0 = <&uart0_pins>;
1107 /* controlled by EC */
1108 vbus-supply = <&pp3300_z1>;
1114 vusb33-supply = <&pp3300_s3>;
1115 vbus-supply = <&pp5000_usb_vbus>;
1123 usb2-lpm-disable;
1127 #include <arm/cros-ec-keyboard.dtsi>
1130 function-row-physmap = <