Lines Matching +full:hs400 +full:- +full:ds +full:- +full:delay
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
11 compatible = "mediatek,mt8188-evb", "mediatek,mt8188";
26 stdout-path = "serial0:115200n8";
34 reserved_memory: reserved-memory {
35 #address-cells = <2>;
36 #size-cells = <2>;
40 compatible = "shared-dma-pool";
42 no-map;
52 pinctrl-names = "default";
53 pinctrl-0 = <&i2c0_pins>;
54 clock-frequency = <400000>;
59 pinctrl-names = "default";
60 pinctrl-0 = <&i2c1_pins>;
61 clock-frequency = <400000>;
66 pinctrl-names = "default";
67 pinctrl-0 = <&i2c2_pins>;
68 clock-frequency = <400000>;
73 pinctrl-names = "default";
74 pinctrl-0 = <&i2c3_pins>;
75 clock-frequency = <400000>;
80 pinctrl-names = "default";
81 pinctrl-0 = <&i2c4_pins>;
82 clock-frequency = <400000>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&i2c5_pins>;
89 clock-frequency = <400000>;
94 pinctrl-names = "default";
95 pinctrl-0 = <&i2c6_pins>;
96 clock-frequency = <400000>;
101 bus-width = <8>;
102 hs400-ds-delay = <0x1481b>;
103 max-frequency = <200000000>;
105 cap-mmc-highspeed;
106 mmc-hs200-1_8v;
107 mmc-hs400-1_8v;
108 supports-cqe;
109 cap-mmc-hw-reset;
110 no-sdio;
111 no-sd;
112 non-removable;
114 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
115 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
117 pinctrl-names = "default", "state_uhs";
118 pinctrl-0 = <&mmc0_default_pins>;
119 pinctrl-1 = <&mmc0_uhs_pins>;
125 regulator-always-on;
129 regulator-always-on;
133 regulator-always-on;
137 regulator-always-on;
141 pinctrl-names = "default";
142 pinctrl-0 = <&nor_pins_default>;
146 compatible = "jedec,spi-nor";
148 spi-max-frequency = <52000000>;
153 adsp_uart_pins: adsp-uart-pins {
154 pins-tx-rx {
160 i2c0_pins: i2c0-pins {
161 pins-bus {
164 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
168 i2c1_pins: i2c1-pins {
169 pins-bus {
172 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
176 i2c2_pins: i2c2-pins {
177 pins-bus {
180 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
184 i2c3_pins: i2c3-pins {
185 pins-bus {
188 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
192 i2c4_pins: i2c4-pins {
193 pins-bus {
196 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
200 i2c5_pins: i2c5-pins {
201 pins-bus {
204 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
208 i2c6_pins: i2c6-pins {
209 pins-bus {
212 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
216 mmc0_default_pins: mmc0-default-pins {
217 pins-cmd-dat {
227 input-enable;
228 drive-strength = <6>;
229 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
232 pins-clk {
234 drive-strength = <6>;
235 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
238 pins-rst {
240 drive-strength = <6>;
241 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
245 mmc0_uhs_pins: mmc0-uhs-pins {
246 pins-cmd-dat {
256 input-enable;
257 drive-strength = <8>;
258 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
261 pins-clk-ds {
264 drive-strength = <8>;
265 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
268 pins-rst {
270 drive-strength = <8>;
271 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
275 nor_pins_default: nor-pins {
276 pins-io-ck {
280 bias-pull-down;
283 pins-io-cs {
287 bias-pull-up;
291 spi0_pins: spi0-pins {
292 pins-spi {
297 bias-disable;
301 spi1_pins: spi1-pins {
302 pins-spi {
307 bias-disable;
311 spi2_pins: spi2-pins {
312 pins-spi {
317 bias-disable;
321 uart0_pins: uart0-pins {
322 pins-rx-tx {
325 bias-pull-up;
331 interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
335 memory-region = <&scp_mem_reserved>;
340 pinctrl-names = "default";
341 pinctrl-0 = <&spi0_pins>;
346 pinctrl-names = "default";
347 pinctrl-0 = <&spi1_pins>;
352 pinctrl-names = "default";
353 pinctrl-0 = <&spi2_pins>;
370 pinctrl-names = "default";
371 pinctrl-0 = <&uart0_pins>;