Lines Matching full:topckgen
855 topckgen: syscon@10000000 { label
856 compatible = "mediatek,mt8186-topckgen", "syscon";
907 clocks = <&topckgen CLK_TOP_MFG>;
934 clocks = <&topckgen CLK_TOP_SENINF>,
935 <&topckgen CLK_TOP_SENINF1>;
943 clocks = <&topckgen CLK_TOP_USB_TOP>,
959 clocks = <&topckgen CLK_TOP_AUDIODSP>,
960 <&topckgen CLK_TOP_ADSP_BUS>;
989 clocks = <&topckgen CLK_TOP_DISP>,
990 <&topckgen CLK_TOP_MDP>,
1007 clocks = <&topckgen CLK_TOP_VDEC>,
1016 clocks = <&topckgen CLK_TOP_SENINF>,
1017 <&topckgen CLK_TOP_SENINF1>,
1018 <&topckgen CLK_TOP_SENINF2>,
1019 <&topckgen CLK_TOP_SENINF3>,
1021 <&topckgen CLK_TOP_CAMTM>,
1022 <&topckgen CLK_TOP_CAM>;
1046 <&topckgen CLK_TOP_IMG1>;
1061 clocks = <&topckgen CLK_TOP_IPE>,
1077 clocks = <&topckgen CLK_TOP_VENC>,
1086 clocks = <&topckgen CLK_TOP_WPE>,
1128 <&topckgen CLK_TOP_SPMI_MST>;
1130 assigned-clocks = <&topckgen CLK_TOP_SPMI_MST>;
1131 assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>;
1167 clocks = <&topckgen CLK_TOP_AUDIODSP>, <&topckgen CLK_TOP_ADSP_BUS>;
1169 assigned-clocks = <&topckgen CLK_TOP_AUDIODSP>,
1170 <&topckgen CLK_TOP_ADSP_BUS>;
1171 assigned-clock-parents = <&clk26m>, <&topckgen CLK_TOP_MAINPLL_D2_D2>;
1195 clocks = <&topckgen CLK_TOP_SPINOR>,
1200 assigned-clocks = <&topckgen CLK_TOP_SPINOR>;
1201 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D3_D8>;
1366 clocks = <&topckgen CLK_TOP_MAINPLL_D5>,
1367 <&topckgen CLK_TOP_SPI>,
1401 clocks = <&topckgen CLK_TOP_DISP_PWM>,
1413 clocks = <&topckgen CLK_TOP_MAINPLL_D5>,
1414 <&topckgen CLK_TOP_SPI>,
1426 clocks = <&topckgen CLK_TOP_MAINPLL_D5>,
1427 <&topckgen CLK_TOP_SPI>,
1439 clocks = <&topckgen CLK_TOP_MAINPLL_D5>,
1440 <&topckgen CLK_TOP_SPI>,
1452 clocks = <&topckgen CLK_TOP_MAINPLL_D5>,
1453 <&topckgen CLK_TOP_SPI>,
1465 clocks = <&topckgen CLK_TOP_MAINPLL_D5>,
1466 <&topckgen CLK_TOP_SPI>,
1507 <&topckgen CLK_TOP_AUDIO>,
1508 <&topckgen CLK_TOP_AUD_INTBUS>,
1509 <&topckgen CLK_TOP_MAINPLL_D2_D4>,
1510 <&topckgen CLK_TOP_AUD_1>,
1512 <&topckgen CLK_TOP_AUD_2>,
1514 <&topckgen CLK_TOP_AUD_ENGEN1>,
1515 <&topckgen CLK_TOP_APLL1_D8>,
1516 <&topckgen CLK_TOP_AUD_ENGEN2>,
1517 <&topckgen CLK_TOP_APLL2_D8>,
1518 <&topckgen CLK_TOP_APLL_I2S0_MCK_SEL>,
1519 <&topckgen CLK_TOP_APLL_I2S1_MCK_SEL>,
1520 <&topckgen CLK_TOP_APLL_I2S2_MCK_SEL>,
1521 <&topckgen CLK_TOP_APLL_I2S4_MCK_SEL>,
1522 <&topckgen CLK_TOP_APLL_TDMOUT_MCK_SEL>,
1523 <&topckgen CLK_TOP_APLL12_CK_DIV0>,
1524 <&topckgen CLK_TOP_APLL12_CK_DIV1>,
1525 <&topckgen CLK_TOP_APLL12_CK_DIV2>,
1526 <&topckgen CLK_TOP_APLL12_CK_DIV4>,
1527 <&topckgen CLK_TOP_APLL12_CK_DIV_TDMOUT_M>,
1528 <&topckgen CLK_TOP_AUDIO_H>,
1558 mediatek,topckgen = <&topckgen>;
1568 clocks = <&topckgen CLK_TOP_USB_TOP>,
1588 clocks = <&topckgen CLK_TOP_USB_TOP>,
1604 clocks = <&topckgen CLK_TOP_MSDC50_0>,
1610 assigned-clocks = <&topckgen CLK_TOP_MSDC50_0>;
1620 clocks = <&topckgen CLK_TOP_MSDC30_1>,
1625 assigned-clocks = <&topckgen CLK_TOP_MSDC30_1>;
1626 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
1864 clocks = <&topckgen CLK_TOP_DPI>,
1868 assigned-clocks = <&topckgen CLK_TOP_DPI>;
1869 assigned-clock-parents = <&topckgen CLK_TOP_TVDPLL_D2>;
2045 clocks = <&topckgen CLK_TOP_VDEC>,
2048 <&topckgen CLK_TOP_UNIVPLL_D3>;
2050 assigned-clocks = <&topckgen CLK_TOP_VDEC>;
2051 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D3>;
2105 assigned-clocks = <&topckgen CLK_TOP_VENC>;
2106 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D3>;