Lines Matching +full:axi +full:- +full:ethernet +full:- +full:1
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
9 #include <dt-bindings/thermal/thermal.h>
11 #include "armada-common.dtsi"
27 thermal-zones {
28 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(ic-thermal) {
29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
42 cooling-maps { };
48 #address-cells = <2>;
49 #size-cells = <2>;
50 compatible = "simple-bus";
51 interrupt-parent = <&CP11X_LABEL(icu_nsr)>;
54 config-space@CP11X_BASE {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 compatible = "simple-bus";
60 CP11X_LABEL(ethernet): ethernet@0 {
61 #address-cells = <1>;
62 #size-cells = <0>;
63 compatible = "marvell,armada-7k-pp22";
65 clocks = <&CP11X_LABEL(clk) 1 3>, <&CP11X_LABEL(clk) 1 9>,
66 <&CP11X_LABEL(clk) 1 5>, <&CP11X_LABEL(clk) 1 6>,
67 <&CP11X_LABEL(clk) 1 18>;
68 clock-names = "pp_clk", "gop_clk",
70 marvell,system-controller = <&CP11X_LABEL(syscon0)>;
72 dma-coherent;
74 CP11X_LABEL(eth0): ethernet-port@0 {
85 interrupt-names = "hif0", "hif1", "hif2",
89 port-id = <0>; /* For backward compatibility. */
90 gop-port-id = <0>;
94 CP11X_LABEL(eth1): ethernet-port@1 {
105 interrupt-names = "hif0", "hif1", "hif2",
108 reg = <1>;
109 port-id = <1>; /* For backward compatibility. */
110 gop-port-id = <2>;
114 CP11X_LABEL(eth2): ethernet-port@2 {
125 interrupt-names = "hif0", "hif1", "hif2",
129 port-id = <2>; /* For backward compatibility. */
130 gop-port-id = <3>;
136 compatible = "marvell,comphy-cp110";
138 marvell,system-controller = <&CP11X_LABEL(syscon0)>;
139 clocks = <&CP11X_LABEL(clk) 1 5>, <&CP11X_LABEL(clk) 1 6>,
140 <&CP11X_LABEL(clk) 1 18>;
141 clock-names = "mg_clk", "mg_core_clk", "axi_clk";
142 #address-cells = <1>;
143 #size-cells = <0>;
147 #phy-cells = <1>;
150 CP11X_LABEL(comphy1): phy@1 {
151 reg = <1>;
152 #phy-cells = <1>;
157 #phy-cells = <1>;
162 #phy-cells = <1>;
167 #phy-cells = <1>;
172 #phy-cells = <1>;
177 #address-cells = <1>;
178 #size-cells = <0>;
179 compatible = "marvell,orion-mdio";
181 clocks = <&CP11X_LABEL(clk) 1 9>, <&CP11X_LABEL(clk) 1 5>,
182 <&CP11X_LABEL(clk) 1 6>, <&CP11X_LABEL(clk) 1 18>;
187 #address-cells = <1>;
188 #size-cells = <0>;
191 clocks = <&CP11X_LABEL(clk) 1 5>,
192 <&CP11X_LABEL(clk) 1 6>, <&CP11X_LABEL(clk) 1 18>;
196 CP11X_LABEL(icu): interrupt-controller@1e0000 {
197 compatible = "marvell,cp110-icu";
199 #address-cells = <1>;
200 #size-cells = <1>;
202 CP11X_LABEL(icu_nsr): interrupt-controller@10 {
203 compatible = "marvell,cp110-icu-nsr";
205 #interrupt-cells = <2>;
206 interrupt-controller;
207 msi-parent = <&gicp>;
210 CP11X_LABEL(icu_sei): interrupt-controller@50 {
211 compatible = "marvell,cp110-icu-sei";
213 #interrupt-cells = <2>;
214 interrupt-controller;
215 msi-parent = <&sei>;
220 compatible = "marvell,armada-8k-rtc";
222 reg-names = "rtc", "rtc-soc";
226 CP11X_LABEL(syscon0): system-controller@440000 {
227 compatible = "syscon", "simple-mfd";
231 compatible = "marvell,cp110-clock";
232 #clock-cells = <2>;
236 compatible = "marvell,armada-8k-gpio";
239 gpio-controller;
240 #gpio-cells = <2>;
241 gpio-ranges = <&CP11X_LABEL(pinctrl) 0 0 32>;
242 marvell,pwm-offset = <0x1f0>;
243 #pwm-cells = <2>;
244 interrupt-controller;
249 #interrupt-cells = <2>;
250 clock-names = "core", "axi";
251 clocks = <&CP11X_LABEL(clk) 1 21>,
252 <&CP11X_LABEL(clk) 1 17>;
257 compatible = "marvell,armada-8k-gpio";
260 gpio-controller;
261 #gpio-cells = <2>;
262 gpio-ranges = <&CP11X_LABEL(pinctrl) 0 32 31>;
263 marvell,pwm-offset = <0x1f0>;
264 #pwm-cells = <2>;
265 interrupt-controller;
270 #interrupt-cells = <2>;
271 clock-names = "core", "axi";
272 clocks = <&CP11X_LABEL(clk) 1 21>,
273 <&CP11X_LABEL(clk) 1 17>;
278 CP11X_LABEL(syscon1): system-controller@400000 {
279 compatible = "syscon", "simple-mfd";
281 #address-cells = <1>;
282 #size-cells = <1>;
284 CP11X_LABEL(thermal): thermal-sensor@70 {
285 compatible = "marvell,armada-cp110-thermal";
287 interrupts-extended =
289 #thermal-sensor-cells = <1>;
294 compatible = "marvell,cp110-utmi-phy";
296 marvell,system-controller = <&CP11X_LABEL(syscon0)>;
297 #address-cells = <1>;
298 #size-cells = <0>;
301 CP11X_LABEL(utmi0): usb-phy@0 {
303 #phy-cells = <0>;
306 CP11X_LABEL(utmi1): usb-phy@1 {
307 reg = <1>;
308 #phy-cells = <0>;
313 compatible = "marvell,armada-8k-xhci",
314 "generic-xhci";
316 dma-coherent;
318 clock-names = "core", "reg";
319 clocks = <&CP11X_LABEL(clk) 1 22>,
320 <&CP11X_LABEL(clk) 1 16>;
325 compatible = "marvell,armada-8k-xhci",
326 "generic-xhci";
328 dma-coherent;
330 clock-names = "core", "reg";
331 clocks = <&CP11X_LABEL(clk) 1 23>,
332 <&CP11X_LABEL(clk) 1 16>;
337 compatible = "marvell,armada-8k-ahci",
338 "generic-ahci";
340 dma-coherent;
342 clocks = <&CP11X_LABEL(clk) 1 15>,
343 <&CP11X_LABEL(clk) 1 16>;
344 #address-cells = <1>;
345 #size-cells = <0>;
348 sata-port@0 {
353 sata-port@1 {
354 reg = <1>;
360 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
362 dma-coherent;
363 msi-parent = <&gic_v2m0>;
364 clock-names = "core", "reg";
365 clocks = <&CP11X_LABEL(clk) 1 8>,
366 <&CP11X_LABEL(clk) 1 14>;
370 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
372 dma-coherent;
373 msi-parent = <&gic_v2m0>;
374 clock-names = "core", "reg";
375 clocks = <&CP11X_LABEL(clk) 1 7>,
376 <&CP11X_LABEL(clk) 1 14>;
380 compatible = "marvell,armada-380-spi";
382 #address-cells = <0x1>;
383 #size-cells = <0x0>;
384 clock-names = "core", "axi";
385 clocks = <&CP11X_LABEL(clk) 1 21>,
386 <&CP11X_LABEL(clk) 1 17>;
391 compatible = "marvell,armada-380-spi";
393 #address-cells = <1>;
394 #size-cells = <0>;
395 clock-names = "core", "axi";
396 clocks = <&CP11X_LABEL(clk) 1 21>,
397 <&CP11X_LABEL(clk) 1 17>;
402 compatible = "marvell,mv78230-i2c";
404 #address-cells = <1>;
405 #size-cells = <0>;
407 clock-names = "core", "reg";
408 clocks = <&CP11X_LABEL(clk) 1 21>,
409 <&CP11X_LABEL(clk) 1 17>;
414 compatible = "marvell,mv78230-i2c";
416 #address-cells = <1>;
417 #size-cells = <0>;
419 clock-names = "core", "reg";
420 clocks = <&CP11X_LABEL(clk) 1 21>,
421 <&CP11X_LABEL(clk) 1 17>;
426 compatible = "snps,dw-apb-uart";
428 reg-shift = <2>;
430 reg-io-width = <1>;
431 clock-names = "baudclk", "apb_pclk";
432 clocks = <&CP11X_LABEL(clk) 1 21>,
433 <&CP11X_LABEL(clk) 1 17>;
438 compatible = "snps,dw-apb-uart";
440 reg-shift = <2>;
442 reg-io-width = <1>;
443 clock-names = "baudclk", "apb_pclk";
444 clocks = <&CP11X_LABEL(clk) 1 21>,
445 <&CP11X_LABEL(clk) 1 17>;
450 compatible = "snps,dw-apb-uart";
452 reg-shift = <2>;
454 reg-io-width = <1>;
455 clock-names = "baudclk", "apb_pclk";
456 clocks = <&CP11X_LABEL(clk) 1 21>,
457 <&CP11X_LABEL(clk) 1 17>;
462 compatible = "snps,dw-apb-uart";
464 reg-shift = <2>;
466 reg-io-width = <1>;
467 clock-names = "baudclk", "apb_pclk";
468 clocks = <&CP11X_LABEL(clk) 1 21>,
469 <&CP11X_LABEL(clk) 1 17>;
473 CP11X_LABEL(nand_controller): nand-controller@720000 {
479 compatible = "marvell,armada-8k-nand-controller",
480 "marvell,armada370-nand-controller";
482 #address-cells = <1>;
483 #size-cells = <0>;
485 clock-names = "core", "reg";
486 clocks = <&CP11X_LABEL(clk) 1 2>,
487 <&CP11X_LABEL(clk) 1 17>;
488 marvell,system-controller = <&CP11X_LABEL(syscon0)>;
493 compatible = "marvell,armada-8k-rng",
494 "inside-secure,safexcel-eip76";
497 clock-names = "core", "reg";
498 clocks = <&CP11X_LABEL(clk) 1 25>,
499 <&CP11X_LABEL(clk) 1 17>;
504 compatible = "marvell,armada-cp110-sdhci";
507 clock-names = "core", "axi";
508 clocks = <&CP11X_LABEL(clk) 1 4>, <&CP11X_LABEL(clk) 1 18>;
509 dma-coherent;
514 compatible = "inside-secure,safexcel-eip197b";
522 interrupt-names = "ring0", "ring1", "ring2", "ring3",
524 clock-names = "core", "reg";
525 clocks = <&CP11X_LABEL(clk) 1 26>,
526 <&CP11X_LABEL(clk) 1 17>;
527 dma-coherent;
532 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
535 reg-names = "ctrl", "config";
536 #address-cells = <3>;
537 #size-cells = <2>;
538 #interrupt-cells = <1>;
540 dma-coherent;
541 msi-parent = <&gic_v2m0>;
543 bus-range = <0 0xff>;
544 /* non-prefetchable memory */
546 interrupt-map-mask = <0 0 0 0>;
547 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 22 IRQ_TYPE_LEVEL_HIGH>;
549 num-lanes = <1>;
550 clock-names = "core", "reg";
551 clocks = <&CP11X_LABEL(clk) 1 13>, <&CP11X_LABEL(clk) 1 14>;
556 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
558 <0 CP11X_PCIEx_CONF_BASE(1) 0 0x80000>;
559 reg-names = "ctrl", "config";
560 #address-cells = <3>;
561 #size-cells = <2>;
562 #interrupt-cells = <1>;
564 dma-coherent;
565 msi-parent = <&gic_v2m0>;
567 bus-range = <0 0xff>;
568 /* non-prefetchable memory */
569 …ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(1) 0 CP11X_PCIEx_MEM_BASE(1) 0 CP11X_PCIEx_MEM_SIZE(1…
570 interrupt-map-mask = <0 0 0 0>;
571 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 24 IRQ_TYPE_LEVEL_HIGH>;
574 num-lanes = <1>;
575 clock-names = "core", "reg";
576 clocks = <&CP11X_LABEL(clk) 1 11>, <&CP11X_LABEL(clk) 1 14>;
581 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
584 reg-names = "ctrl", "config";
585 #address-cells = <3>;
586 #size-cells = <2>;
587 #interrupt-cells = <1>;
589 dma-coherent;
590 msi-parent = <&gic_v2m0>;
592 bus-range = <0 0xff>;
593 /* non-prefetchable memory */
595 interrupt-map-mask = <0 0 0 0>;
596 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 23 IRQ_TYPE_LEVEL_HIGH>;
599 num-lanes = <1>;
600 clock-names = "core", "reg";
601 clocks = <&CP11X_LABEL(clk) 1 12>, <&CP11X_LABEL(clk) 1 14>;