Lines Matching +full:0 +full:xfffc4000

22 		service_reserved: svcbuffer@0 {
24 			reg = <0x0 0x0 0x0 0x2000000>;
25 			alignment = <0x1000>;
32 		#size-cells = <0>;
34 		cpu0: cpu@0 {
38 			reg = <0x0>;
45 			reg = <0x1>;
52 			reg = <0x2>;
59 			reg = <0x3>;
77 		#address-cells = <0x2>;
78 		#size-cells = <0x2>;
105 		reg = <0x0 0xfffc1000 0x0 0x1000>,
106 		      <0x0 0xfffc2000 0x0 0x2000>,
107 		      <0x0 0xfffc4000 0x0 0x2000>,
108 		      <0x0 0xfffc6000 0x0 0x2000>;
115 			#clock-cells = <0>;
120 			#clock-cells = <0>;
125 			#clock-cells = <0>;
130 			#clock-cells = <0>;
135 			#clock-cells = <0>;
151 		#phy-cells = <0>;
155 	soc@0 {
161 		ranges = <0 0 0 0xffffffff>;
165 			reg = <0xffd10000 0x1000>;
171 			reg = <0xff800000 0x2000>;
181 			altr,sysmgr-syscon = <&sysmgr 0x44 0>;
189 			reg = <0xff802000 0x2000>;
199 			altr,sysmgr-syscon = <&sysmgr 0x48 0>;
207 			reg = <0xff804000 0x2000>;
217 			altr,sysmgr-syscon = <&sysmgr 0x4c 0>;
225 			#size-cells = <0>;
227 			reg = <0xffc03200 0x100>;
231 			porta: gpio-controller@0 {
236 				reg = <0>;
245 			#size-cells = <0>;
247 			reg = <0xffc03300 0x100>;
251 			portb: gpio-controller@0 {
256 				reg = <0>;
265 			#size-cells = <0>;
267 			reg = <0xffc02800 0x100>;
276 			#size-cells = <0>;
278 			reg = <0xffc02900 0x100>;
287 			#size-cells = <0>;
289 			reg = <0xffc02a00 0x100>;
298 			#size-cells = <0>;
300 			reg = <0xffc02b00 0x100>;
309 			#size-cells = <0>;
311 			reg = <0xffc02c00 0x100>;
320 			#size-cells = <0>;
322 			reg = <0xff808000 0x1000>;
324 			fifo-depth = <0x400>;
331 			altr,sysmgr-syscon = <&sysmgr 0x28 4>;
337 			#size-cells = <0>;
339 			reg = <0xffb90000 0x10000>,
340 			      <0xffb80000 0x1000>;
353 			reg = <0xffe00000 0x40000>;
356 			ranges = <0 0xffe00000 0x40000>;
361 			reg = <0xffda0000 0x1000>;
381 			reg = <0xffd13000 0xa0>;
383 			pinctrl-single,function-mask = <0x0000000f>;
389 			reg = <0xffd13100 0x20>;
395 			reg = <0xffd11000 0x100>;
401 			reg = <0xfa000000 0x40000>;
442 			stream-match-mask = <0x7ff0>;
452 			#size-cells = <0>;
453 			reg = <0xffda4000 0x1000>;
466 			#size-cells = <0>;
467 			reg = <0xffda5000 0x1000>;
479 			reg = <0xffd12000 0x500>;
485 			reg = <0xffc03000 0x100>;
493 			reg = <0xffc03100 0x100>;
501 			reg = <0xffd00000 0x100>;
509 			reg = <0xffd00100 0x100>;
516 			reg = <0xffc02000 0x100>;
527 			reg = <0xffc02100 0x100>;
538 			reg = <0xffb00000 0x40000>;
552 			reg = <0xffb40000 0x40000>;
565 			reg = <0xffd00200 0x100>;
574 			reg = <0xffd00300 0x100>;
583 			reg = <0xffd00400 0x100>;
592 			reg = <0xffd00500 0x100>;
601 			reg = <0xf8011100 0xc0>;
624 				reg = <0xff8cc000 0x100>;
632 				reg = <0xff8c4000 0x100>;
640 				reg = <0xff8c0000 0x100>;
648 				reg = <0xff8c0400 0x100>;
656 				reg = <0xff8c8c00 0x100>;
666 			#size-cells = <0>;
667 			reg = <0xff8d2000 0x100>,
668 			      <0xff900000 0x100000>;
672 			cdns,trigger-address = <0x00000000>;