Lines Matching +full:imx8qxp +full:- +full:hsio

1 // SPDX-License-Identifier: GPL-2.0+
8 	phyx1_lpcg: clock-controller@5f090000 {
9 		compatible = "fsl,imx8qxp-lpcg";
13 		#clock-cells = <1>;
14 		clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_1>,
16 		clock-output-names = "hsio_phyx1_pclk",
20 		power-domains = <&pd IMX_SC_R_SERDES_1>;
24 		compatible = "fsl,imx8qxp-hsio";
29 		reg-names = "reg", "phy", "ctrl", "misc";
35 		clock-names = "pclk0", "apb_pclk0", "phy0_crr", "ctl0_crr",
37 		#phy-cells = <3>;
38 		power-domains = <&pd IMX_SC_R_SERDES_1>;