Lines Matching +full:1 +full:c03000

102 		#address-cells = <1>;
125 		A53_1: cpu@1 {
236 			#address-cells = <1>;
247 			port@1 {
248 				reg = <1>;
327 			thermal-sensors = <&tmu 1>;
379 		#address-cells = <1>;
380 		#size-cells = <1>;
450 		funnel@28c03000 {
457 				#address-cells = <1>;
468 				port@1 {
469 					reg = <1>;
528 			#address-cells = <1>;
529 			#size-cells = <1>;
583 				dmas = <&sdma2 0 24 0>, <&sdma2 1 24 0>;
703 				#thermal-sensor-cells = <1>;
777 					#mux-control-cells = <1>;
786 				#address-cells = <1>;
787 				#size-cells = <1>;
819 				#clock-cells = <1>;
853 				#clock-cells = <1>;
887 				#reset-cells = <1>;
899 					#address-cells = <1>;
922 					pgc_pcie: power-domain@1 {
998 			#address-cells = <1>;
999 			#size-cells = <1>;
1058 			#address-cells = <1>;
1059 			#size-cells = <1>;
1088 				#address-cells = <1>;
1096 				dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
1102 				#address-cells = <1>;
1110 				dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
1116 				#address-cells = <1>;
1124 				dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
1222 				#address-cells = <1>;
1223 				#size-cells = <1>;
1254 				#address-cells = <1>;
1281 					#address-cells = <1>;
1286 						#address-cells = <1>;
1294 					port@1 {
1295 						reg = <1>;
1326 				#address-cells = <1>;
1336 				#address-cells = <1>;
1346 				#address-cells = <1>;
1356 				#address-cells = <1>;
1398 					#address-cells = <1>;
1401 					port@1 {
1402 						reg = <1>;
1450 					#address-cells = <1>;
1453 					port@1 {
1454 						reg = <1>;
1517 				#address-cells = <1>;
1578 			#interconnect-cells = <1>;
1601 			#address-cells = <1>;
1602 			#size-cells = <1>;
1614 				#interrupt-cells = <1>;
1731 			#power-domain-cells = <1>;
1745 			num-lanes = <1>;
1748 			#interrupt-cells = <1>;
1750 			interrupt-map = <0 0 0 1 &gic GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1788 			num-lanes = <1>;
1791 			#interrupt-cells = <1>;
1793 			interrupt-map = <0 0 0 1 &gic GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
1798 			linux,pci-domain = <1>;
1827 			num-lanes = <1>;