Lines Matching +full:clk +full:- +full:pins
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2019-2021 TQ-Systems GmbH
6 /dts-v1/;
8 #include "imx8mq-tqma8mq.dtsi"
12 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ on MBa8Mx";
13 compatible = "tq,imx8mq-tqma8mq-mba8mx", "tq,imx8mq-tqma8mq", "fsl,imx8mq";
14 chassis-type = "embedded";
24 extcon_usbotg: extcon-usbotg0 {
25 compatible = "linux,extcon-usb-gpio";
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_usbcon0>;
28 id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
31 reg_otg_vbus: regulator-otg-vbus {
32 compatible = "regulator-fixed";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_regotgvbus>;
35 regulator-name = "MBA8MQ_OTG_VBUS";
36 regulator-min-microvolt = <5000000>;
37 regulator-max-microvolt = <5000000>;
39 enable-active-high;
42 reg_usdhc2_vmmc: regulator-vmmc {
43 compatible = "regulator-fixed";
44 regulator-name = "VSD_3V3";
45 regulator-min-microvolt = <3300000>;
46 regulator-max-microvolt = <3300000>;
48 enable-active-high;
67 gpio-controller;
68 #gpio-cells = <2>;
69 vcc-supply = <®_vcc_3v3>;
70 pinctrl-names = "default";
71 pinctrl-0 = <&pinctrl_expander>;
72 interrupt-parent = <&gpio1>;
74 interrupt-controller;
75 #interrupt-cells = <2>;
77 mpcie-rst-hog {
78 gpio-hog;
80 output-high;
81 line-name = "MPCIE_RST#";
96 reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>;
97 clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>,
100 <&clk IMX8MQ_CLK_PCIE1_AUX>;
109 clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
112 <&clk IMX8MQ_CLK_PCIE2_AUX>;
117 assigned-clocks = <&clk IMX8MQ_CLK_SAI3>;
118 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
119 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
120 clocks = <&clk IMX8MQ_CLK_SAI3_IPG>, <&clk IMX8MQ_CLK_DUMMY>,
121 <&clk IMX8MQ_CLK_SAI3_ROOT>, <&clk IMX8MQ_CLK_DUMMY>,
122 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_AUDIO_PLL1_OUT>,
123 <&clk IMX8MQ_AUDIO_PLL2_OUT>;
127 clock-names = "mclk";
128 clocks = <&clk IMX8MQ_CLK_SAI3_ROOT>;
132 assigned-clocks = <&clk IMX8MQ_CLK_UART1>;
133 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
137 assigned-clocks = <&clk IMX8MQ_CLK_UART2>;
138 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
143 assigned-clocks = <&clk IMX8MQ_CLK_UART3>;
144 assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
148 vbus-supply = <®_otg_vbus>;
155 hnp-disable;
156 srp-disable;
157 adp-disable;
163 vbus-supply = <®_hub_vbus>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_wdog>;
175 fsl,ext-reset-output;
181 fsl,pins = <MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x0000004e>,
188 fsl,pins = <MX8MQ_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x0000004e>,
195 fsl,pins = <MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0xd6>;
199 fsl,pins = <MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3>,
216 fsl,pins = <MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x41>,
222 fsl,pins = <MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x41>,
228 fsl,pins = <MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000067>,
233 fsl,pins = <MX8MQ_IOMUXC_I2C2_SCL_GPIO5_IO16 0x40000067>,
238 fsl,pins = <MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000067>,
243 fsl,pins = <MX8MQ_IOMUXC_I2C3_SCL_GPIO5_IO18 0x40000067>,
248 fsl,pins = <MX8MQ_IOMUXC_GPIO1_IO14_PWM3_OUT 0x16>;
252 fsl,pins = <MX8MQ_IOMUXC_GPIO1_IO15_PWM4_OUT 0x16>;
257 fsl,pins = <MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x06>;
261 fsl,pins = <MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0xc1>;
265 fsl,pins = <MX8MQ_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6>,
275 fsl,pins = <MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x79>,
280 fsl,pins = <MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x79>,
285 fsl,pins = <MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x79>,
290 fsl,pins = <MX8MQ_IOMUXC_UART4_RXD_UART4_DCE_RX 0x79>,
295 /* ID: floating / high: device, low: host -> use PU */
296 fsl,pins = <MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xe6>;
300 fsl,pins = <MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83>,
309 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
310 fsl,pins = <MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x85>,
319 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
320 fsl,pins = <MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f>,
329 pinctrl_usdhc2_gpio: usdhc2-gpiogrp {
330 fsl,pins = <MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41>;