Lines Matching +full:0 +full:xc7
21 reg = <0x00000000 0x40000000 0 0x40000000>;
26 #clock-cells = <0>;
42 gpio-fan,speed-map = <0 0>, <8600 1>;
46 pinctrl-0 = <&pinctrl_gpio_fan>;
98 <&A53_0 0 1>; /* Exclude highest OPP */
104 <&A53_0 0 2>; /* Exclude two highest OPPs */
109 cooling-device = <&fan 0 1>;
117 pinctrl-0 = <&pinctrl_i2c1>;
122 reg = <0x4b>;
124 pinctrl-0 = <&pinctrl_pmic>;
125 #clock-cells = <0>;
264 pinctrl-0 = <&pinctrl_fec1>;
272 #size-cells = <0>;
273 ethphy0: ethernet-phy@0 {
275 reg = <0>;
285 pinctrl-0 = <&pinctrl_uart1>;
291 pinctrl-0 = <&pinctrl_usdhc1>;
301 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
330 pinctrl-0 = <&pinctrl_wdog>;
338 MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3
339 MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x23
340 MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
341 MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
342 MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
343 MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
344 MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
345 MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
346 MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
347 MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
348 MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
349 MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
350 MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
351 MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
352 MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
358 MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5 0x16
364 MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x4000007f
365 MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x4000007f
371 MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
377 MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49
378 MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49
384 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83
385 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3
386 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3
387 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3
388 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3
389 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3
390 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3
391 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3
392 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3
393 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3
394 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83
395 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
401 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x85
402 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc5
403 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc5
404 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc5
405 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc5
406 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc5
407 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc5
408 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc5
409 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc5
410 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc5
411 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x85
412 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
418 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x87
419 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc7
420 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc7
421 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc7
422 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc7
423 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc7
424 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc7
425 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc7
426 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc7
427 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc7
428 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x87
429 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
435 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41
436 MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
442 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83
443 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3
444 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3
445 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3
446 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3
447 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3
448 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
454 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x85
455 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc5
456 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc5
457 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc5
458 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc5
459 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc5
460 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
466 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x87
467 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc7
468 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc7
469 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc7
470 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc7
471 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc7
472 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
478 MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6