Lines Matching +full:regulator +full:- +full:state +full:- +full:standby
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/interrupt-controller/irq.h>
10 model = "Kontron OSM-S i.MX8MP";
11 compatible = "kontron,imx8mp-osm-s", "fsl,imx8mp";
29 stdout-path = &uart3;
32 reg_usb1_vbus: regulator-usb1-vbus {
33 compatible = "regulator-fixed";
34 pinctrl-names = "default";
35 pinctrl-0 = <&pinctrl_reg_usb1_vbus>;
37 enable-active-high;
38 regulator-min-microvolt = <5000000>;
39 regulator-max-microvolt = <5000000>;
40 regulator-name = "VBUS_USB_A";
43 reg_usb2_vbus: regulator-usb2-vbus {
44 compatible = "regulator-fixed";
45 pinctrl-names = "default";
46 pinctrl-0 = <&pinctrl_reg_usb2_vbus>;
48 enable-active-high;
49 regulator-min-microvolt = <5000000>;
50 regulator-max-microvolt = <5000000>;
51 regulator-name = "VBUS_USB_B";
54 reg_usdhc2_vcc: regulator-usdhc2-vcc {
55 compatible = "regulator-fixed";
56 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_reg_usdhc2_vcc>;
59 enable-active-high;
60 regulator-min-microvolt = <3300000>;
61 regulator-max-microvolt = <3300000>;
62 regulator-name = "VCC_SDIO_A";
65 reg_usdhc3_vcc: regulator-usdhc3-vcc {
66 compatible = "regulator-fixed";
67 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_reg_usdhc3_vcc>;
70 enable-active-high;
71 regulator-min-microvolt = <3300000>;
72 regulator-max-microvolt = <3300000>;
73 regulator-name = "VCC_SDIO_B";
76 reg_vdd_carrier: regulator-vdd-carrier {
77 compatible = "regulator-fixed";
78 pinctrl-names = "default";
79 pinctrl-0 = <&pinctrl_reg_vdd_carrier>;
81 enable-active-high;
82 regulator-always-on;
83 regulator-boot-on;
84 regulator-name = "VDD_CARRIER";
86 regulator-state-standby {
87 regulator-on-in-suspend;
90 regulator-state-mem {
91 regulator-off-in-suspend;
94 regulator-state-disk {
95 regulator-off-in-suspend;
101 cpu-supply = <®_vdd_arm>;
105 cpu-supply = <®_vdd_arm>;
109 cpu-supply = <®_vdd_arm>;
113 cpu-supply = <®_vdd_arm>;
116 &ecspi1 { /* OSM-S SPI_A */
117 pinctrl-names = "default";
118 pinctrl-0 = <&pinctrl_ecspi1>;
119 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
122 &ecspi2 { /* OSM-S SPI_B */
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_ecspi2>;
125 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
128 &flexcan1 { /* OSM-S CAN_A */
129 pinctrl-names = "default";
130 pinctrl-0 = <&pinctrl_flexcan1>;
133 &flexcan2 { /* OSM-S CAN_B */
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_flexcan2>;
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_gpio1>;
141 gpio-line-names = "GPIO_A_0", "GPIO_A_1", "", "",
152 gpio-line-names = "", "", "", "", "", "", "", "", "", "", "", "",
159 pinctrl-names = "default";
160 pinctrl-0 = <&pinctrl_gpio3>;
161 gpio-line-names = "PCIE_WAKE", "PCIE_CLKREQ", "PCIE_A_PERST", "SDIO_B_D5",
172 pinctrl-names = "default";
173 pinctrl-0 = <&pinctrl_gpio4>;
174 gpio-line-names = "GPIO_B_5", "GPIO_B_6", "GPIO_B_7", "GPIO_C_0",
185 gpio-line-names = "I2S_BITCLK", "I2S_A_DATA_OUT", "I2S_MCLK", "PWM_2",
195 &i2c1 { /* OSM-S I2C_A */
196 clock-frequency = <400000>;
197 pinctrl-names = "default", "gpio";
198 pinctrl-0 = <&pinctrl_i2c1>;
199 pinctrl-1 = <&pinctrl_i2c1_gpio>;
200 scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
201 sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
204 &i2c2 { /* OSM-S I2C_B */
205 clock-frequency = <400000>;
206 pinctrl-names = "default", "gpio";
207 pinctrl-0 = <&pinctrl_i2c2>;
208 pinctrl-1 = <&pinctrl_i2c2_gpio>;
209 scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
210 sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
213 &i2c3 { /* OSM-S PCIe SMDAT/SMCLK */
214 clock-frequency = <400000>;
215 pinctrl-names = "default", "gpio";
216 pinctrl-0 = <&pinctrl_i2c3>;
217 pinctrl-1 = <&pinctrl_i2c3_gpio>;
218 scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
219 sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
222 &i2c4 { /* OSM-S I2C_CAM */
223 clock-frequency = <400000>;
224 pinctrl-names = "default", "gpio";
225 pinctrl-0 = <&pinctrl_i2c4>;
226 pinctrl-1 = <&pinctrl_i2c4_gpio>;
227 scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
228 sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
232 clock-frequency = <400000>;
233 pinctrl-names = "default", "gpio";
234 pinctrl-0 = <&pinctrl_i2c5>;
235 pinctrl-1 = <&pinctrl_i2c5_gpio>;
236 scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
237 sda-gpios = <&gpio3 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
243 pinctrl-names = "default";
244 pinctrl-0 = <&pinctrl_pmic>;
245 interrupt-parent = <&gpio1>;
247 nxp,i2c-lt-enable;
251 regulator-name = "+0V8_VDD_SOC (BUCK1)";
252 regulator-min-microvolt = <850000>;
253 regulator-max-microvolt = <950000>;
254 regulator-boot-on;
255 regulator-always-on;
256 regulator-ramp-delay = <3125>;
260 regulator-name = "+0V9_VDD_ARM (BUCK2)";
261 regulator-min-microvolt = <850000>;
262 regulator-max-microvolt = <950000>;
263 regulator-boot-on;
264 regulator-always-on;
265 regulator-ramp-delay = <3125>;
266 nxp,dvs-run-voltage = <950000>;
267 nxp,dvs-standby-voltage = <850000>;
271 regulator-name = "+3V3 (BUCK4)";
272 regulator-min-microvolt = <3300000>;
273 regulator-max-microvolt = <3300000>;
274 regulator-boot-on;
275 regulator-always-on;
279 regulator-name = "+1V8 (BUCK5)";
280 regulator-min-microvolt = <1800000>;
281 regulator-max-microvolt = <1800000>;
282 regulator-boot-on;
283 regulator-always-on;
287 regulator-name = "+1V1_NVCC_DRAM (BUCK6)";
288 regulator-min-microvolt = <1100000>;
289 regulator-max-microvolt = <1100000>;
290 regulator-boot-on;
291 regulator-always-on;
295 regulator-name = "+1V8_NVCC_SNVS (LDO1)";
296 regulator-min-microvolt = <1800000>;
297 regulator-max-microvolt = <1800000>;
298 regulator-boot-on;
299 regulator-always-on;
303 regulator-name = "+1V8_VDDA (LDO3)";
304 regulator-min-microvolt = <1800000>;
305 regulator-max-microvolt = <1800000>;
306 regulator-boot-on;
307 regulator-always-on;
311 regulator-name = "NVCC_SD (LDO5)";
312 regulator-min-microvolt = <1800000>;
313 regulator-max-microvolt = <3300000>;
323 num-addresses = <1>;
329 pinctrl-names = "default";
330 pinctrl-0 = <&pinctrl_rtc>;
331 interrupts-extended = <&gpio3 24 IRQ_TYPE_LEVEL_LOW>;
335 &pwm1 { /* OSM-S PWM_0 */
336 pinctrl-names = "default";
337 pinctrl-0 = <&pinctrl_pwm1>;
340 &pwm2 { /* OSM-S PWM_1 */
341 pinctrl-names = "default";
342 pinctrl-0 = <&pinctrl_pwm2>;
345 &pwm3 { /* OSM-S PWM_2 */
346 pinctrl-names = "default";
347 pinctrl-0 = <&pinctrl_pwm3>;
350 &sai3 { /* OSM-S I2S_A */
351 pinctrl-names = "default";
352 pinctrl-0 = <&pinctrl_sai3>;
355 &uart1 { /* OSM-S UART_A */
356 pinctrl-names = "default";
357 pinctrl-0 = <&pinctrl_uart1>;
360 &uart2 { /* OSM-S UART_C */
361 pinctrl-names = "default";
362 pinctrl-0 = <&pinctrl_uart2>;
365 &uart3 { /* OSM-S UART_CON */
366 pinctrl-names = "default";
367 pinctrl-0 = <&pinctrl_uart3>;
371 &uart4 { /* OSM-S UART_B */
372 pinctrl-names = "default";
373 pinctrl-0 = <&pinctrl_uart4>;
376 &usb3_0 { /* OSM-S USB_A */
377 pinctrl-names = "default";
378 pinctrl-0 = <&pinctrl_usb1_oc>;
379 fsl,over-current-active-low;
382 &usb3_1 { /* OSM-S USB_B */
383 pinctrl-names = "default";
384 pinctrl-0 = <&pinctrl_usb2_oc>;
385 fsl,over-current-active-low;
389 pinctrl-names = "default", "state_100mhz", "state_200mhz";
390 pinctrl-0 = <&pinctrl_usdhc1>;
391 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
392 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
393 vmmc-supply = <®_vdd_3v3>;
394 vqmmc-supply = <®_vdd_1v8>;
395 bus-width = <8>;
396 non-removable;
400 &usdhc2 { /* OSM-S SDIO_A */
401 pinctrl-names = "default", "state_100mhz", "state_200mhz";
402 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>, <&pinctrl_usdhc2_wp>;
403 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>, <&pinctrl_usdhc2_wp>;
404 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>, <&pinctrl_usdhc2_wp>;
405 vmmc-supply = <®_usdhc2_vcc>;
406 vqmmc-supply = <®_nvcc_sd>;
407 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
410 &usdhc3 { /* OSM-S SDIO_B */
411 pinctrl-names = "default", "state_100mhz", "state_200mhz";
412 pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_usdhc3_gpio>;
413 pinctrl-1 = <&pinctrl_usdhc3_100mhz>, <&pinctrl_usdhc3_gpio>;
414 pinctrl-2 = <&pinctrl_usdhc3_200mhz>, <&pinctrl_usdhc3_gpio>;
415 vmmc-supply = <®_usdhc3_vcc>;
416 vqmmc-supply = <®_nvcc_sd>;
417 cd-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
418 wp-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
422 pinctrl-names = "default";
423 pinctrl-0 = <&pinctrl_wdog>;
424 fsl,ext-reset-output;
769 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
786 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
815 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
827 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
866 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
881 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {