Lines Matching +full:num +full:- +full:interpolated +full:- +full:steps
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #address-cells = <2>;
9 #size-cells = <2>;
12 framebuffer-panel0 {
13 compatible = "simple-framebuffer";
27 power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_LCDIF>,
29 dvdd-supply = <®_3v3_dvdd>;
30 avdd-supply = <®_v3v3_avdd>;
36 compatible = "pwm-backlight";
38 brightness-levels = <0 100>;
39 num-interpolated-steps = <100>;
40 default-brightness-level = <50>;
44 reg_3v3_dvdd: regulator-3v3-O3 {
45 compatible = "regulator-fixed";
46 pinctrl-names = "default";
47 pinctrl-0 = <&pinctrl_dvdd>;
48 regulator-name = "3v3-dvdd-supply";
49 regulator-min-microvolt = <3300000>;
50 regulator-max-microvolt = <3300000>;
54 reg_v3v3_avdd: regulator-3v3-O2 {
55 compatible = "regulator-fixed";
56 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_avdd>;
58 regulator-name = "3v3-avdd-supply";
59 regulator-min-microvolt = <3300000>;
60 regulator-max-microvolt = <3300000>;
66 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_bl>;
72 assigned-clocks = <&clk IMX8MN_VIDEO_PLL1>;
73 assigned-clock-rates = <594000000>;
78 assigned-clocks = <&clk IMX8MN_CLK_DISP_AXI>, <&clk IMX8MN_CLK_DISP_APB>;
79 assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_1000M>, <&clk IMX8MN_SYS_PLL1_800M>;
80 assigned-clock-rates = <500000000>, <200000000>;
84 #address-cells = <1>;
85 #size-cells = <0>;
86 samsung,esc-clock-frequency = <20000000>;
87 samsung,pll-clock-frequency = <12000000>;
92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_panel>;
97 dvdd-supply = <®_3v3_dvdd>;
98 avdd-supply = <®_v3v3_avdd>;
99 reset-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
103 remote-endpoint = <&mipi_dsi_out>;
114 remote-endpoint = <&panel_in>;