Lines Matching +full:imx8qxp +full:- +full:hsio
1 // SPDX-License-Identifier: GPL-2.0+
7 phyx1_lpcg: clock-controller@5f090000 {
8 compatible = "fsl,imx8qxp-lpcg";
12 #clock-cells = <1>;
13 clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_1>,
15 clock-output-names = "hsio_phyx1_pclk",
19 power-domains = <&pd IMX_SC_R_SERDES_1>;
23 compatible = "fsl,imx8qxp-hsio";
28 reg-names = "reg", "phy", "ctrl", "misc";
34 clock-names = "pclk0", "apb_pclk0", "phy0_crr", "ctl0_crr",
36 #phy-cells = <3>;
37 power-domains = <&pd IMX_SC_R_SERDES_1>;
43 #interrupt-cells = <1>;
45 interrupt-names = "msi";
46 interrupt-map = <0 0 0 1 &gic 0 47 4>,
50 interrupt-map-mask = <0 0 0 0x7>;