Lines Matching +full:cpu +full:- +full:syscon
1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/samsung,exynosautov920.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/soc/samsung,exynos-usi.h>
15 #address-cells = <2>;
16 #size-cells = <1>;
18 interrupt-parent = <&gic>;
31 arm-pmu {
32 compatible = "arm,cortex-a78-pmu";
37 compatible = "fixed-clock";
38 #clock-cells = <0>;
39 clock-output-names = "oscclk";
43 #address-cells = <2>;
44 #size-cells = <0>;
46 cpu-map {
49 cpu = <&cpu0>;
52 cpu = <&cpu1>;
55 cpu = <&cpu2>;
58 cpu = <&cpu3>;
64 cpu = <&cpu4>;
67 cpu = <&cpu5>;
70 cpu = <&cpu6>;
73 cpu = <&cpu7>;
79 cpu = <&cpu8>;
82 cpu = <&cpu9>;
87 cpu0: cpu@0 {
88 device_type = "cpu";
89 compatible = "arm,cortex-a78ae";
91 enable-method = "psci";
94 cpu1: cpu@100 {
95 device_type = "cpu";
96 compatible = "arm,cortex-a78ae";
98 enable-method = "psci";
101 cpu2: cpu@200 {
102 device_type = "cpu";
103 compatible = "arm,cortex-a78ae";
105 enable-method = "psci";
108 cpu3: cpu@300 {
109 device_type = "cpu";
110 compatible = "arm,cortex-a78ae";
112 enable-method = "psci";
115 cpu4: cpu@10000 {
116 device_type = "cpu";
117 compatible = "arm,cortex-a78ae";
119 enable-method = "psci";
122 cpu5: cpu@10100 {
123 device_type = "cpu";
124 compatible = "arm,cortex-a78ae";
126 enable-method = "psci";
129 cpu6: cpu@10200 {
130 device_type = "cpu";
131 compatible = "arm,cortex-a78ae";
133 enable-method = "psci";
136 cpu7: cpu@10300 {
137 device_type = "cpu";
138 compatible = "arm,cortex-a78ae";
140 enable-method = "psci";
143 cpu8: cpu@20000 {
144 device_type = "cpu";
145 compatible = "arm,cortex-a78ae";
147 enable-method = "psci";
150 cpu9: cpu@20100 {
151 device_type = "cpu";
152 compatible = "arm,cortex-a78ae";
154 enable-method = "psci";
159 compatible = "arm,psci-1.0";
164 compatible = "simple-bus";
165 #address-cells = <1>;
166 #size-cells = <1>;
170 compatible = "samsung,exynosautov920-chipid",
171 "samsung,exynos850-chipid";
175 cmu_misc: clock-controller@10020000 {
176 compatible = "samsung,exynosautov920-cmu-misc";
178 #clock-cells = <1>;
182 clock-names = "oscclk",
187 compatible = "samsung,exynosautov920-wdt";
191 clock-names = "watchdog", "watchdog_src";
192 samsung,syscon-phandle = <&pmu_system_controller>;
193 samsung,cluster-index = <0>;
197 compatible = "samsung,exynosautov920-wdt";
201 clock-names = "watchdog", "watchdog_src";
202 samsung,syscon-phandle = <&pmu_system_controller>;
203 samsung,cluster-index = <1>;
206 gic: interrupt-controller@10400000 {
207 compatible = "arm,gic-v3";
208 #interrupt-cells = <3>;
209 #address-cells = <0>;
210 interrupt-controller;
216 spdma0: dma-controller@10180000 {
221 clock-names = "apb_pclk";
222 #dma-cells = <1>;
225 spdma1: dma-controller@10190000 {
230 clock-names = "apb_pclk";
231 #dma-cells = <1>;
234 pdma0: dma-controller@101a0000 {
239 clock-names = "apb_pclk";
240 #dma-cells = <1>;
243 pdma1: dma-controller@101b0000 {
248 clock-names = "apb_pclk";
249 #dma-cells = <1>;
252 pdma2: dma-controller@101c0000 {
257 clock-names = "apb_pclk";
258 #dma-cells = <1>;
261 pdma3: dma-controller@101d0000 {
266 clock-names = "apb_pclk";
267 #dma-cells = <1>;
270 pdma4: dma-controller@101e0000 {
275 clock-names = "apb_pclk";
276 #dma-cells = <1>;
279 cmu_peric0: clock-controller@10800000 {
280 compatible = "samsung,exynosautov920-cmu-peric0";
282 #clock-cells = <1>;
287 clock-names = "oscclk",
292 syscon_peric0: syscon@10820000 {
293 compatible = "samsung,exynosautov920-peric0-sysreg",
294 "syscon";
299 compatible = "samsung,exynosautov920-pinctrl";
305 compatible = "samsung,exynosautov920-usi",
306 "samsung,exynos850-usi";
310 #address-cells = <1>;
311 #size-cells = <1>;
315 clock-names = "pclk", "ipclk";
319 compatible = "samsung,exynosautov920-uart",
320 "samsung,exynos850-uart";
323 pinctrl-names = "default";
324 pinctrl-0 = <&uart0_bus>;
327 clock-names = "uart", "clk_uart_baud0";
328 samsung,uart-fifosize = <256>;
334 compatible = "samsung,exynosautov920-pwm",
335 "samsung,exynos4210-pwm";
337 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
338 #pwm-cells = <3>;
340 clock-names = "timers";
344 cmu_peric1: clock-controller@10c00000 {
345 compatible = "samsung,exynosautov920-cmu-peric1";
347 #clock-cells = <1>;
352 clock-names = "oscclk",
357 syscon_peric1: syscon@10c20000 {
358 compatible = "samsung,exynosautov920-peric1-sysreg",
359 "syscon";
364 compatible = "samsung,exynosautov920-pinctrl";
369 cmu_top: clock-controller@11000000 {
370 compatible = "samsung,exynosautov920-cmu-top";
372 #clock-cells = <1>;
375 clock-names = "oscclk";
379 compatible = "samsung,exynosautov920-pinctrl";
382 wakeup-interrupt-controller {
383 compatible = "samsung,exynosautov920-wakeup-eint";
387 pmu_system_controller: system-controller@11860000 {
388 compatible = "samsung,exynosautov920-pmu",
389 "samsung,exynos7-pmu","syscon";
393 cmu_hsi0: clock-controller@16000000 {
394 compatible = "samsung,exynosautov920-cmu-hsi0";
396 #clock-cells = <1>;
400 clock-names = "oscclk",
405 compatible = "samsung,exynosautov920-pinctrl";
410 cmu_hsi1: clock-controller@16400000 {
411 compatible = "samsung,exynosautov920-cmu-hsi1";
413 #clock-cells = <1>;
419 clock-names = "oscclk",
426 compatible = "samsung,exynosautov920-pinctrl";
432 compatible = "samsung,exynosautov920-pinctrl";
438 compatible = "samsung,exynosautov920-pinctrl";
444 compatible = "samsung,exynosautov920-pinctrl";
450 compatible = "arm,armv8-timer";
459 #include "exynosautov920-pinctrl.dtsi"