Lines Matching +full:non +full:- +full:updatable
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
8 #include <dt-bindings/clock/samsung,exynos8895.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <1>;
16 interrupt-parent = <&gic>;
29 arm-a53-pmu {
30 compatible = "arm,cortex-a53-pmu";
35 interrupt-affinity = <&cpu0>,
41 mongoose-m2-pmu {
42 compatible = "samsung,mongoose-pmu";
47 interrupt-affinity = <&cpu4>,
54 #address-cells = <1>;
55 #size-cells = <0>;
57 cpu-map {
91 compatible = "samsung,mongoose-m2";
93 enable-method = "psci";
98 compatible = "samsung,mongoose-m2";
100 enable-method = "psci";
105 compatible = "samsung,mongoose-m2";
107 enable-method = "psci";
112 compatible = "samsung,mongoose-m2";
114 enable-method = "psci";
119 compatible = "arm,cortex-a53";
121 enable-method = "psci";
126 compatible = "arm,cortex-a53";
128 enable-method = "psci";
133 compatible = "arm,cortex-a53";
135 enable-method = "psci";
140 compatible = "arm,cortex-a53";
142 enable-method = "psci";
146 oscclk: osc-clock {
147 compatible = "fixed-clock";
148 #clock-cells = <0>;
149 clock-output-names = "oscclk";
161 compatible = "simple-bus";
164 #address-cells = <1>;
165 #size-cells = <1>;
168 compatible = "samsung,exynos8895-chipid",
169 "samsung,exynos850-chipid";
173 cmu_peris: clock-controller@10010000 {
174 compatible = "samsung,exynos8895-cmu-peris";
176 #clock-cells = <1>;
179 clock-names = "oscclk", "bus";
183 compatible = "samsung,exynos8895-mct",
184 "samsung,exynos4210-mct";
187 clock-names = "fin_pll", "mct";
202 gic: interrupt-controller@10201000 {
203 compatible = "arm,gic-400";
208 #interrupt-cells = <3>;
209 interrupt-controller;
212 #address-cells = <0>;
213 #size-cells = <1>;
216 cmu_peric0: clock-controller@10400000 {
217 compatible = "samsung,exynos8895-cmu-peric0";
219 #clock-cells = <1>;
227 clock-names = "oscclk", "bus", "uart", "usi0",
232 compatible = "samsung,exynos8895-uart";
236 clock-names = "uart", "clk_uart_baud0";
238 pinctrl-names = "default";
239 pinctrl-0 = <&uart0_bus>;
240 samsung,uart-fifosize = <256>;
245 compatible = "samsung,exynos8895-pinctrl";
250 cmu_peric1: clock-controller@10800000 {
251 compatible = "samsung,exynos8895-cmu-peric1";
253 #clock-cells = <1>;
270 clock-names = "oscclk", "bus", "speedy", "cam0",
277 compatible = "samsung,exynos8895-uart";
281 clock-names = "uart", "clk_uart_baud0";
283 pinctrl-names = "default";
284 pinctrl-0 = <&uart1_bus>;
285 samsung,uart-fifosize = <256>;
290 compatible = "samsung,exynos8895-pinctrl";
296 compatible = "samsung,exynos8895-hsi2c";
299 clock-names = "hsi2c";
301 pinctrl-0 = <&hsi2c1_bus>;
302 pinctrl-names = "default";
307 compatible = "samsung,exynos8895-hsi2c";
310 clock-names = "hsi2c";
312 pinctrl-0 = <&hsi2c2_bus>;
313 pinctrl-names = "default";
318 compatible = "samsung,exynos8895-hsi2c";
321 clock-names = "hsi2c";
323 pinctrl-0 = <&hsi2c3_bus>;
324 pinctrl-names = "default";
329 compatible = "samsung,exynos8895-hsi2c";
332 clock-names = "hsi2c";
334 pinctrl-0 = <&hsi2c4_bus>;
335 pinctrl-names = "default";
340 compatible = "samsung,exynos8895-spi",
341 "samsung,exynos850-spi";
343 #address-cells = <1>;
344 #size-cells = <0>;
347 clock-names = "spi", "spi_busclk0";
349 pinctrl-0 = <&spi0_bus>;
350 pinctrl-names = "default";
355 compatible = "samsung,exynos8895-spi",
356 "samsung,exynos850-spi";
358 #address-cells = <1>;
359 #size-cells = <0>;
362 clock-names = "spi", "spi_busclk0";
364 pinctrl-0 = <&spi1_bus>;
365 pinctrl-names = "default";
369 cmu_fsys0: clock-controller@11000000 {
370 compatible = "samsung,exynos8895-cmu-fsys0";
372 #clock-cells = <1>;
379 clock-names = "oscclk", "bus", "dpgtc", "mmc",
384 compatible = "samsung,exynos8895-pinctrl";
389 cmu_fsys1: clock-controller@11400000 {
390 compatible = "samsung,exynos8895-cmu-fsys1";
392 #clock-cells = <1>;
398 clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
402 compatible = "samsung,exynos8895-pinctrl";
408 compatible = "samsung,exynos8895-pinctrl";
413 compatible = "samsung,exynos8895-pinctrl";
418 compatible = "samsung,exynos8895-pinctrl";
423 cmu_top: clock-controller@15a80000 {
424 compatible = "samsung,exynos8895-cmu-top";
426 #clock-cells = <1>;
428 clock-names = "oscclk";
431 pmu_system_controller: system-controller@16480000 {
432 compatible = "samsung,exynos8895-pmu",
433 "samsung,exynos7-pmu", "syscon";
438 compatible = "samsung,exynos8895-pinctrl";
441 wakeup-interrupt-controller {
442 compatible = "samsung,exynos8895-wakeup-eint",
443 "samsung,exynos7-wakeup-eint";
444 interrupt-parent = <&gic>;
451 compatible = "arm,armv8-timer";
458 * Non-updatable, broken stock Samsung bootloader does not
461 clock-frequency = <26000000>;
465 #include "exynos8895-pinctrl.dtsi"
466 #include "arm/samsung/exynos-syscon-restart.dtsi"