Lines Matching +full:0 +full:x11000000
55 #size-cells = <0>;
89 cpu4: cpu@0 {
92 reg = <0x0>;
99 reg = <0x1>;
106 reg = <0x2>;
113 reg = <0x3>;
120 reg = <0x100>;
127 reg = <0x101>;
134 reg = <0x102>;
141 reg = <0x103>;
148 #clock-cells = <0>;
155 cpu_off = <0x84000002>;
156 cpu_on = <0xc4000003>;
157 cpu_suspend = <0xc4000001>;
160 soc: soc@0 {
162 ranges = <0x0 0x0 0x0 0x20000000>;
170 reg = <0x10000000 0x24>;
175 reg = <0x10010000 0x8000>;
185 reg = <0x10040000 0x800>;
204 reg = <0x10201000 0x1000>,
205 <0x10202000 0x1000>,
206 <0x10204000 0x2000>,
207 <0x10206000 0x2000>;
212 #address-cells = <0>;
218 reg = <0x10400000 0x8000>;
233 reg = <0x10430000 0x100>;
239 pinctrl-0 = <&uart0_bus>;
246 reg = <0x104d0000 0x1000>;
252 reg = <0x10800000 0x8000>;
278 reg = <0x10830000 0x100>;
284 pinctrl-0 = <&uart1_bus>;
291 reg = <0x10980000 0x1000>;
297 reg = <0x10990000 0x1000>;
301 pinctrl-0 = <&hsi2c1_bus>;
308 reg = <0x109a0000 0x1000>;
312 pinctrl-0 = <&hsi2c2_bus>;
319 reg = <0x109b0000 0x1000>;
323 pinctrl-0 = <&hsi2c3_bus>;
330 reg = <0x109c0000 0x1000>;
334 pinctrl-0 = <&hsi2c4_bus>;
342 reg = <0x109d0000 0x100>;
344 #size-cells = <0>;
349 pinctrl-0 = <&spi0_bus>;
357 reg = <0x109e0000 0x100>;
359 #size-cells = <0>;
364 pinctrl-0 = <&spi1_bus>;
371 reg = <0x11000000 0x8000>;
385 reg = <0x11050000 0x1000>;
391 reg = <0x11400000 0x8000>;
403 reg = <0x11430000 0x1000>;
409 reg = <0x13e60000 0x1000>;
414 reg = <0x14080000 0x1000>;
419 reg = <0x15a30000 0x1000>;
425 reg = <0x15a80000 0x8000>;
434 reg = <0x16480000 0x10000>;
439 reg = <0x164b0000 0x1000>;