Lines Matching +full:reg +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
13 #include <dt-bindings/clock/exynos850.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/soc/samsung,exynos-usi.h>
20 #address-cells = <2>;
21 #size-cells = <1>;
23 interrupt-parent = <&gic>;
34 arm-pmu {
35 compatible = "arm,cortex-a55-pmu";
44 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
49 oscclk: clock-oscclk {
50 compatible = "fixed-clock";
51 clock-output-names = "oscclk";
52 #clock-cells = <0>;
56 #address-cells = <1>;
57 #size-cells = <0>;
59 cpu-map {
93 compatible = "arm,cortex-a55";
94 reg = <0x0>;
95 enable-method = "psci";
97 clock-names = "cluster0_clk";
101 compatible = "arm,cortex-a55";
102 reg = <0x1>;
103 enable-method = "psci";
107 compatible = "arm,cortex-a55";
108 reg = <0x2>;
109 enable-method = "psci";
113 compatible = "arm,cortex-a55";
114 reg = <0x3>;
115 enable-method = "psci";
119 compatible = "arm,cortex-a55";
120 reg = <0x100>;
121 enable-method = "psci";
123 clock-names = "cluster1_clk";
127 compatible = "arm,cortex-a55";
128 reg = <0x101>;
129 enable-method = "psci";
133 compatible = "arm,cortex-a55";
134 reg = <0x102>;
135 enable-method = "psci";
139 compatible = "arm,cortex-a55";
140 reg = <0x103>;
141 enable-method = "psci";
146 compatible = "arm,psci-1.0";
151 compatible = "arm,armv8-timer";
161 compatible = "simple-bus";
162 #address-cells = <1>;
163 #size-cells = <1>;
167 compatible = "samsung,exynos850-chipid";
168 reg = <0x10000000 0x100>;
172 compatible = "samsung,exynos850-mct",
173 "samsung,exynos4210-mct";
174 reg = <0x10040000 0x800>;
188 clock-names = "fin_pll", "mct";
191 pdma0: dma-controller@120c0000 {
193 reg = <0x120c0000 0x1000>;
195 clock-names = "apb_pclk";
196 #dma-cells = <1>;
198 arm,pl330-broken-no-flushp;
201 gic: interrupt-controller@12a01000 {
202 compatible = "arm,gic-400";
203 #interrupt-cells = <3>;
204 #address-cells = <0>;
205 reg = <0x12a01000 0x1000>,
209 interrupt-controller;
214 pmu_system_controller: system-controller@11860000 {
215 compatible = "samsung,exynos850-pmu", "syscon";
216 reg = <0x11860000 0x10000>;
218 reboot: syscon-reboot {
219 compatible = "syscon-reboot";
228 compatible = "samsung,exynos850-wdt";
229 reg = <0x10050000 0x100>;
232 clock-names = "watchdog", "watchdog_src";
233 samsung,syscon-phandle = <&pmu_system_controller>;
234 samsung,cluster-index = <0>;
239 compatible = "samsung,exynos850-wdt";
240 reg = <0x10060000 0x100>;
243 clock-names = "watchdog", "watchdog_src";
244 samsung,syscon-phandle = <&pmu_system_controller>;
245 samsung,cluster-index = <1>;
249 cmu_peri: clock-controller@10030000 {
250 compatible = "samsung,exynos850-cmu-peri";
251 reg = <0x10030000 0x8000>;
252 #clock-cells = <1>;
257 clock-names = "oscclk", "dout_peri_bus",
261 cmu_cpucl1: clock-controller@10800000 {
262 compatible = "samsung,exynos850-cmu-cpucl1";
263 reg = <0x10800000 0x8000>;
264 #clock-cells = <1>;
268 clock-names = "oscclk", "dout_cpucl1_switch",
272 cmu_cpucl0: clock-controller@10900000 {
273 compatible = "samsung,exynos850-cmu-cpucl0";
274 reg = <0x10900000 0x8000>;
275 #clock-cells = <1>;
279 clock-names = "oscclk", "dout_cpucl0_switch",
283 cmu_g3d: clock-controller@11400000 {
284 compatible = "samsung,exynos850-cmu-g3d";
285 reg = <0x11400000 0x8000>;
286 #clock-cells = <1>;
289 clock-names = "oscclk", "dout_g3d_switch";
292 cmu_apm: clock-controller@11800000 {
293 compatible = "samsung,exynos850-cmu-apm";
294 reg = <0x11800000 0x8000>;
295 #clock-cells = <1>;
298 clock-names = "oscclk", "dout_clkcmu_apm_bus";
301 cmu_cmgp: clock-controller@11c00000 {
302 compatible = "samsung,exynos850-cmu-cmgp";
303 reg = <0x11c00000 0x8000>;
304 #clock-cells = <1>;
307 clock-names = "oscclk", "gout_clkcmu_cmgp_bus";
310 cmu_core: clock-controller@12000000 {
311 compatible = "samsung,exynos850-cmu-core";
312 reg = <0x12000000 0x8000>;
313 #clock-cells = <1>;
319 clock-names = "oscclk", "dout_core_bus",
324 cmu_top: clock-controller@120e0000 {
325 compatible = "samsung,exynos850-cmu-top";
326 reg = <0x120e0000 0x8000>;
327 #clock-cells = <1>;
330 clock-names = "oscclk";
333 cmu_mfcmscl: clock-controller@12c00000 {
334 compatible = "samsung,exynos850-cmu-mfcmscl";
335 reg = <0x12c00000 0x8000>;
336 #clock-cells = <1>;
343 clock-names = "oscclk", "dout_mfcmscl_mfc",
348 cmu_dpu: clock-controller@13000000 {
349 compatible = "samsung,exynos850-cmu-dpu";
350 reg = <0x13000000 0x8000>;
351 #clock-cells = <1>;
354 clock-names = "oscclk", "dout_dpu";
357 cmu_hsi: clock-controller@13400000 {
358 compatible = "samsung,exynos850-cmu-hsi";
359 reg = <0x13400000 0x8000>;
360 #clock-cells = <1>;
366 clock-names = "oscclk", "dout_hsi_bus",
370 cmu_is: clock-controller@14500000 {
371 compatible = "samsung,exynos850-cmu-is";
372 reg = <0x14500000 0x8000>;
373 #clock-cells = <1>;
380 clock-names = "oscclk", "dout_is_bus", "dout_is_itp",
384 cmu_aud: clock-controller@14a00000 {
385 compatible = "samsung,exynos850-cmu-aud";
386 reg = <0x14a00000 0x8000>;
387 #clock-cells = <1>;
390 clock-names = "oscclk", "dout_aud";
394 compatible = "samsung,exynos850-pinctrl";
395 reg = <0x11850000 0x1000>;
397 wakeup-interrupt-controller {
398 compatible = "samsung,exynos850-wakeup-eint",
399 "samsung,exynos7-wakeup-eint";
404 compatible = "samsung,exynos850-pinctrl";
405 reg = <0x11c30000 0x1000>;
407 wakeup-interrupt-controller {
408 compatible = "samsung,exynos850-wakeup-eint",
409 "samsung,exynos7-wakeup-eint";
414 compatible = "samsung,exynos850-pinctrl";
415 reg = <0x12070000 0x1000>;
420 compatible = "samsung,exynos850-trng";
421 reg = <0x12081400 0x100>;
424 clock-names = "secss", "pclk";
428 compatible = "samsung,exynos850-pinctrl";
429 reg = <0x13430000 0x1000>;
434 compatible = "samsung,exynos850-pinctrl";
435 reg = <0x139b0000 0x1000>;
440 compatible = "samsung,exynos850-pinctrl";
441 reg = <0x14a60000 0x1000>;
445 compatible = "samsung,exynos850-rtc", "samsung,s3c6410-rtc";
446 reg = <0x11a30000 0x100>;
450 clock-names = "rtc";
455 compatible = "samsung,exynos850-dw-mshc-smu",
456 "samsung,exynos7-dw-mshc-smu";
457 reg = <0x12100000 0x2000>;
459 #address-cells = <1>;
460 #size-cells = <0>;
463 clock-names = "biu", "ciu";
464 fifo-depth = <0x40>;
469 compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
470 reg = <0x13830000 0x100>;
472 #address-cells = <1>;
473 #size-cells = <0>;
474 pinctrl-names = "default";
475 pinctrl-0 = <&i2c0_pins>;
477 clock-names = "i2c";
482 compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
483 reg = <0x13840000 0x100>;
485 #address-cells = <1>;
486 #size-cells = <0>;
487 pinctrl-names = "default";
488 pinctrl-0 = <&i2c1_pins>;
490 clock-names = "i2c";
495 compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
496 reg = <0x13850000 0x100>;
498 #address-cells = <1>;
499 #size-cells = <0>;
500 pinctrl-names = "default";
501 pinctrl-0 = <&i2c2_pins>;
503 clock-names = "i2c";
508 compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
509 reg = <0x13860000 0x100>;
511 #address-cells = <1>;
512 #size-cells = <0>;
513 pinctrl-names = "default";
514 pinctrl-0 = <&i2c3_pins>;
516 clock-names = "i2c";
521 compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
522 reg = <0x13870000 0x100>;
524 #address-cells = <1>;
525 #size-cells = <0>;
526 pinctrl-names = "default";
527 pinctrl-0 = <&i2c4_pins>;
529 clock-names = "i2c";
535 compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
536 reg = <0x13880000 0x100>;
538 #address-cells = <1>;
539 #size-cells = <0>;
540 pinctrl-names = "default";
541 pinctrl-0 = <&i2c5_pins>;
543 clock-names = "i2c";
549 compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
550 reg = <0x13890000 0x100>;
552 #address-cells = <1>;
553 #size-cells = <0>;
554 pinctrl-names = "default";
555 pinctrl-0 = <&i2c6_pins>;
557 clock-names = "i2c";
562 compatible = "samsung,exynos-sysmmu";
563 reg = <0x12c50000 0x9000>;
565 clock-names = "sysmmu";
567 #iommu-cells = <0>;
571 compatible = "samsung,exynos-sysmmu";
572 reg = <0x130c0000 0x9000>;
574 clock-names = "sysmmu";
576 #iommu-cells = <0>;
580 compatible = "samsung,exynos-sysmmu";
581 reg = <0x14550000 0x9000>;
583 clock-names = "sysmmu";
585 #iommu-cells = <0>;
589 compatible = "samsung,exynos-sysmmu";
590 reg = <0x14570000 0x9000>;
592 clock-names = "sysmmu";
594 #iommu-cells = <0>;
598 compatible = "samsung,exynos-sysmmu";
599 reg = <0x14850000 0x9000>;
601 clock-names = "sysmmu";
603 #iommu-cells = <0>;
607 compatible = "samsung,exynos850-peri-sysreg",
608 "samsung,exynos850-sysreg", "syscon";
609 reg = <0x10020000 0x10000>;
614 compatible = "samsung,exynos850-cmgp-sysreg",
615 "samsung,exynos850-sysreg", "syscon";
616 reg = <0x11c20000 0x10000>;
621 compatible = "samsung,exynos850-dwusb3";
625 clock-names = "bus_early", "ref";
626 #address-cells = <1>;
627 #size-cells = <1>;
632 reg = <0x0 0x10000>;
635 phy-names = "usb2-phy";
640 compatible = "samsung,exynos850-usbdrd-phy";
641 reg = <0x135d0000 0x100>;
644 clock-names = "phy", "ref";
645 samsung,pmu-syscon = <&pmu_system_controller>;
646 #phy-cells = <1>;
651 compatible = "samsung,exynos850-usi";
652 reg = <0x138200c0 0x20>;
655 #address-cells = <1>;
656 #size-cells = <1>;
660 clock-names = "pclk", "ipclk";
664 compatible = "samsung,exynos850-uart";
665 reg = <0x13820000 0xc0>;
667 pinctrl-names = "default";
668 pinctrl-0 = <&uart0_pins>;
671 clock-names = "uart", "clk_uart_baud0";
677 compatible = "samsung,exynos850-usi";
678 reg = <0x138a00c0 0x20>;
681 #address-cells = <1>;
682 #size-cells = <1>;
686 clock-names = "pclk", "ipclk";
690 compatible = "samsung,exynos850-hsi2c",
691 "samsung,exynosautov9-hsi2c";
692 reg = <0x138a0000 0xc0>;
694 #address-cells = <1>;
695 #size-cells = <0>;
696 pinctrl-names = "default";
697 pinctrl-0 = <&hsi2c0_pins>;
700 clock-names = "hsi2c", "hsi2c_pclk";
706 compatible = "samsung,exynos850-usi";
707 reg = <0x138b00c0 0x20>;
710 #address-cells = <1>;
711 #size-cells = <1>;
715 clock-names = "pclk", "ipclk";
719 compatible = "samsung,exynos850-hsi2c",
720 "samsung,exynosautov9-hsi2c";
721 reg = <0x138b0000 0xc0>;
723 #address-cells = <1>;
724 #size-cells = <0>;
725 pinctrl-names = "default";
726 pinctrl-0 = <&hsi2c1_pins>;
729 clock-names = "hsi2c", "hsi2c_pclk";
735 compatible = "samsung,exynos850-usi";
736 reg = <0x138c00c0 0x20>;
739 #address-cells = <1>;
740 #size-cells = <1>;
744 clock-names = "pclk", "ipclk";
748 compatible = "samsung,exynos850-hsi2c",
749 "samsung,exynosautov9-hsi2c";
750 reg = <0x138c0000 0xc0>;
752 #address-cells = <1>;
753 #size-cells = <0>;
754 pinctrl-names = "default";
755 pinctrl-0 = <&hsi2c2_pins>;
758 clock-names = "hsi2c", "hsi2c_pclk";
764 compatible = "samsung,exynos850-usi";
765 reg = <0x139400c0 0x20>;
768 #address-cells = <1>;
769 #size-cells = <1>;
773 clock-names = "pclk", "ipclk";
777 compatible = "samsung,exynos850-spi";
778 reg = <0x13940000 0x30>;
781 clock-names = "spi", "spi_busclk0";
783 dma-names = "tx", "rx";
785 pinctrl-0 = <&spi0_pins>;
786 pinctrl-names = "default";
787 num-cs = <1>;
788 samsung,spi-src-clk = <0>;
789 #address-cells = <1>;
790 #size-cells = <0>;
796 compatible = "samsung,exynos850-usi";
797 reg = <0x11d000c0 0x20>;
800 #address-cells = <1>;
801 #size-cells = <1>;
805 clock-names = "pclk", "ipclk";
809 compatible = "samsung,exynos850-hsi2c",
810 "samsung,exynosautov9-hsi2c";
811 reg = <0x11d00000 0xc0>;
813 #address-cells = <1>;
814 #size-cells = <0>;
815 pinctrl-names = "default";
816 pinctrl-0 = <&hsi2c3_pins>;
819 clock-names = "hsi2c", "hsi2c_pclk";
824 compatible = "samsung,exynos850-uart";
825 reg = <0x11d00000 0xc0>;
827 pinctrl-names = "default";
828 pinctrl-0 = <&uart1_single_pins>;
831 clock-names = "uart", "clk_uart_baud0";
836 compatible = "samsung,exynos850-spi";
837 reg = <0x11d00000 0x30>;
840 clock-names = "spi", "spi_busclk0";
842 dma-names = "tx", "rx";
844 pinctrl-0 = <&spi1_pins>;
845 pinctrl-names = "default";
846 num-cs = <1>;
847 samsung,spi-src-clk = <0>;
848 #address-cells = <1>;
849 #size-cells = <0>;
855 compatible = "samsung,exynos850-usi";
856 reg = <0x11d200c0 0x20>;
859 #address-cells = <1>;
860 #size-cells = <1>;
864 clock-names = "pclk", "ipclk";
868 compatible = "samsung,exynos850-hsi2c",
869 "samsung,exynosautov9-hsi2c";
870 reg = <0x11d20000 0xc0>;
872 #address-cells = <1>;
873 #size-cells = <0>;
874 pinctrl-names = "default";
875 pinctrl-0 = <&hsi2c4_pins>;
878 clock-names = "hsi2c", "hsi2c_pclk";
883 compatible = "samsung,exynos850-uart";
884 reg = <0x11d20000 0xc0>;
886 pinctrl-names = "default";
887 pinctrl-0 = <&uart2_single_pins>;
890 clock-names = "uart", "clk_uart_baud0";
895 compatible = "samsung,exynos850-spi";
896 reg = <0x11d20000 0x30>;
899 clock-names = "spi", "spi_busclk0";
901 dma-names = "tx", "rx";
903 pinctrl-0 = <&spi2_pins>;
904 pinctrl-names = "default";
905 num-cs = <1>;
906 samsung,spi-src-clk = <0>;
907 #address-cells = <1>;
908 #size-cells = <0>;
915 #include "exynos850-pinctrl.dtsi"