Lines Matching +full:0 +full:x300
16 #clock-cells = <0>;
23 #clock-cells = <0>;
30 #clock-cells = <0>;
37 #clock-cells = <0>;
45 #size-cells = <0>;
54 cpu0: cpu@0 {
57 reg = <0x000>;
59 d-cache-size = <0x10000>;
62 i-cache-size = <0x10000>;
69 cache-size = <0x80000>;
81 reg = <0x100>;
83 d-cache-size = <0x10000>;
86 i-cache-size = <0x10000>;
93 cache-size = <0x80000>;
105 reg = <0x200>;
107 d-cache-size = <0x10000>;
110 i-cache-size = <0x10000>;
117 cache-size = <0x80000>;
129 reg = <0x300>;
131 d-cache-size = <0x10000>;
134 i-cache-size = <0x10000>;
141 cache-size = <0x80000>;
157 cache-size = <0x200000>;
175 atf@0 {
176 reg = <0x0 0x0 0x0 0x80000>;
182 size = <0x0 0x4000000>; /* 64MB */
185 alloc-ranges = <0x0 0x00000000 0x0 0x40000000>;
191 ranges = <0x00000000 0x10 0x00000000 0x80000000>;
198 reg = <0x00fff000 0x260>,
199 <0x00fff400 0x200>;
209 reg = <0x7c003000 0x1000>;
219 reg = <0x7c013880 0x40>;
221 #mbox-cells = <0>;
226 reg = <0x7d001000 0x200>;
230 arm,primecell-periphid = <0x00341011>;
236 reg = <0x7d517000 0x10>;
244 reg = <0x7d517c00 0x40>;
256 reg = <0x7fff9000 0x1000>,
257 <0x7fffa000 0x2000>,
258 <0x7fffc000 0x2000>,
259 <0x7fffe000 0x2000>;
266 reg = <0x7d510600 0x30>;
274 reg = <0x7c410000 0x100>;
280 reg = <0x7c411000 0x100>;
286 reg = <0x7c500000 0x28>;
293 reg = <0x7c501000 0x20>;
295 interrupts = <0>;
300 reg = <0x7c502000 0x30>;
308 reg = <0x7c700000 0x10>;
316 reg = <0x7d508200 0x58>;
321 #size-cells = <0>;
326 reg = <0x7d508280 0x58>;
331 #size-cells = <0>;
336 reg = <0x7d508380 0x10>;
344 reg = <0x7d508400 0x10>;
352 reg = <0x7c701400 0x300>,
353 <0x7c701000 0x200>,
354 <0x7c701d00 0x300>,
355 <0x7c702000 0x80>,
356 <0x7c703800 0x200>,
357 <0x7c704000 0x800>,
358 <0x7c700100 0x80>,
359 <0x7d510800 0x100>,
360 <0x7c720000 0x100>;
381 reg = <0x7c706400 0x300>,
382 <0x7c706000 0x200>,
383 <0x7c706d00 0x300>,
384 <0x7c707000 0x80>,
385 <0x7c708800 0x200>,
386 <0x7c709000 0x800>,
387 <0x7c700180 0x80>,
388 <0x7d511000 0x100>,
389 <0x7c720000 0x100>;
414 ranges = <0x00 0x00000000 0x00 0x00000000 0x10 0x00000000>,
415 <0x10 0x00000000 0x10 0x00000000 0x01 0x00000000>,
416 <0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>,
417 <0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>,
418 <0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>;
420 dma-ranges = <0x00 0x00000000 0x00 0x00000000 0x10 0x00000000>,
421 <0x10 0x00000000 0x10 0x00000000 0x01 0x00000000>,
422 <0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>,
423 <0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>,
424 <0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>;
446 #clock-cells = <0>;
453 #clock-cells = <0>;
461 reg = <0x10 0x7c580000 0x0 0x1a000>;