Lines Matching +full:capacity +full:- +full:dmips +full:- +full:mhz
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-g12.dtsi"
13 #address-cells = <0x2>;
14 #size-cells = <0x0>;
16 cpu-map {
48 compatible = "arm,cortex-a53";
50 enable-method = "psci";
51 capacity-dmips-mhz = <592>;
52 next-level-cache = <&l2>;
53 #cooling-cells = <2>;
58 compatible = "arm,cortex-a53";
60 enable-method = "psci";
61 capacity-dmips-mhz = <592>;
62 next-level-cache = <&l2>;
63 #cooling-cells = <2>;
68 compatible = "arm,cortex-a73";
70 enable-method = "psci";
71 capacity-dmips-mhz = <1024>;
72 next-level-cache = <&l2>;
73 #cooling-cells = <2>;
78 compatible = "arm,cortex-a73";
80 enable-method = "psci";
81 capacity-dmips-mhz = <1024>;
82 next-level-cache = <&l2>;
83 #cooling-cells = <2>;
88 compatible = "arm,cortex-a73";
90 enable-method = "psci";
91 capacity-dmips-mhz = <1024>;
92 next-level-cache = <&l2>;
93 #cooling-cells = <2>;
98 compatible = "arm,cortex-a73";
100 enable-method = "psci";
101 capacity-dmips-mhz = <1024>;
102 next-level-cache = <&l2>;
103 #cooling-cells = <2>;
106 l2: l2-cache0 {
108 cache-level = <2>;
109 cache-unified;
115 compatible = "amlogic,g12b-clkc";
119 cooling-maps {
122 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
131 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
142 dma-coherent;
146 compatible = "amlogic,g12b-ddr-pmu";
150 power-domains = <&pwrc PWRC_G12A_NNA_ID>;