Lines Matching +full:0 +full:xfd000400
23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x0 0x0>;
37 reg = <0x0 0x1>;
72 size = <0x0 0x800000>;
73 alignment = <0x0 0x400000>;
95 reg = <0x0 0xfd000400 0x0 0x290>;
98 #size-cells = <0>;
105 reg = <0x0 0xfe000000 0x0 0x1000000>;
108 ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>;
110 reset: reset-controller@0 {
112 reg = <0x0 0x0 0x0 0x8c>;
123 reg = <0x0 0x0400 0x0 0x003c>,
124 <0x0 0x0480 0x0 0x0118>;
128 gpio-ranges = <&periphs_pinctrl 0 0 62>;
472 reg = <0x0 0x0440 0x0 0x14>;
481 reg = <0 0x800 0 0x104>;
497 reg = <0x0 0x1400 0x0 0x20>;
500 #size-cells = <0>;
508 reg = <0x0 0x1c00 0x0 0x18>;
518 reg = <0x0 0x2000 0x0 0x18>;
528 reg = <0x0 0x2400 0x0 0x24>;
539 reg = <0x0 0x2800 0x0 0x24>;
550 reg = <0x0 0x2c00 0x0 0x48>;
566 reg = <0x0 0x5c00 0x0 0x20>;
569 #size-cells = <0>;
577 reg = <0x0 0x6800 0x0 0x20>;
580 #size-cells = <0>;
588 reg = <0x0 0x6c00 0x0 0x20>;
591 #size-cells = <0>;
600 reg = <0x0 0x4000 0x0 0x60>;
603 #phy-cells = <0>;
609 reg = <0x0 0x4c00 0x0 0x50>;
614 #thermal-sensor-cells = <0>;
621 reg = <0x0 0x5118 0x0 0x4>;
627 reg = <0x0 0x5a20 0x0 0x140>;
634 reg = <0x0 0x5400 0x0 0x24>;
644 reg = <0 0x7c80 0 0x18c>;
653 reg = <0x0 0x10000 0x0 0x800>;
672 reg = <0x0 0xfe004400 0x0 0xa0>;
693 reg = <0x0 0xff400000 0x0 0x100000>;
697 snps,quirk-frame-length-adjustment = <0x20>;
703 reg = <0x0 0xff500000 0x0 0x40000>;
718 reg = <0x0 0xff901000 0x0 0x1000>,
719 <0x0 0xff902000 0x0 0x2000>,
720 <0x0 0xff904000 0x0 0x2000>,
721 <0x0 0xff906000 0x0 0x2000>;
726 #address-cells = <0>;
733 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
735 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
737 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
739 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
746 #clock-cells = <0>;