Lines Matching +full:0 +full:x01c20c00
47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
57 i-cache-size = <0x8000>;
60 d-cache-size = <0x8000>;
74 i-cache-size = <0x8000>;
77 d-cache-size = <0x8000>;
91 i-cache-size = <0x8000>;
94 d-cache-size = <0x8000>;
108 i-cache-size = <0x8000>;
111 d-cache-size = <0x8000>;
121 cache-size = <0x80000>;
143 #clock-cells = <0>;
150 #clock-cells = <0>;
172 #size-cells = <0>;
183 simple-audio-card,dai-link@0 {
194 sound-dai = <&codec 0>;
216 polling-delay-passive = <0>;
217 polling-delay = <0>;
218 thermal-sensors = <&ths 0>;
263 polling-delay-passive = <0>;
264 polling-delay = <0>;
278 polling-delay-passive = <0>;
279 polling-delay = <0>;
300 reg = <0x1000000 0x400000>;
304 ranges = <0 0x1000000 0x400000>;
306 display_clocks: clock@0 {
308 reg = <0x0 0x10000>;
321 reg = <0x20000 0x10000>;
331 compatible = "allwinner,sun50i-a64-de2-mixer-0";
332 reg = <0x100000 0x100000>;
341 #size-cells = <0>;
345 #size-cells = <0>;
348 mixer0_out_tcon0: endpoint@0 {
349 reg = <0>;
363 reg = <0x200000 0x100000>;
372 #size-cells = <0>;
376 #size-cells = <0>;
379 mixer1_out_tcon0: endpoint@0 {
380 reg = <0>;
395 reg = <0x01c00000 0x1000>;
402 reg = <0x00018000 0x28000>;
405 ranges = <0 0x00018000 0x28000>;
407 de2_sram: sram-section@0 {
409 reg = <0x0000 0x28000>;
415 reg = <0x01d00000 0x40000>;
418 ranges = <0 0x01d00000 0x40000>;
420 ve_sram: sram-section@0 {
423 reg = <0x000000 0x40000>;
430 reg = <0x01c02000 0x1000>;
442 reg = <0x01c0c000 0x1000>;
447 #clock-cells = <0>;
455 #size-cells = <0>;
457 tcon0_in: port@0 {
459 #size-cells = <0>;
460 reg = <0>;
462 tcon0_in_mixer0: endpoint@0 {
463 reg = <0>;
475 #size-cells = <0>;
490 reg = <0x01c0d000 0x1000>;
499 #size-cells = <0>;
501 tcon1_in: port@0 {
503 #size-cells = <0>;
504 reg = <0>;
506 tcon1_in_mixer0: endpoint@0 {
507 reg = <0>;
519 #size-cells = <0>;
532 reg = <0x01c0e000 0x1000>;
543 reg = <0x01c0f000 0x1000>;
552 #size-cells = <0>;
557 reg = <0x01c10000 0x1000>;
566 #size-cells = <0>;
571 reg = <0x01c11000 0x1000>;
580 #size-cells = <0>;
585 reg = <0x1c14000 0x400>;
590 reg = <0x34 0x8>;
596 reg = <0x01c15000 0x1000>;
606 reg = <0x01c17000 0x1000>;
615 reg = <0x01c19000 0x0400>;
620 phys = <&usbphy 0>;
622 extcon = <&usbphy 0>;
629 reg = <0x01c19400 0x14>,
630 <0x01c1a800 0x4>,
631 <0x01c1b800 0x4>;
649 reg = <0x01c1a000 0x100>;
656 phys = <&usbphy 0>;
663 reg = <0x01c1a400 0x100>;
668 phys = <&usbphy 0>;
675 reg = <0x01c1b000 0x100>;
689 reg = <0x01c1b400 0x100>;
701 reg = <0x01c20000 0x400>;
710 reg = <0x01c20800 0x400>;
878 reg = <0x01c20c00 0xa0>;
887 reg = <0x01c20ca0 0x20>;
893 #sound-dai-cells = <0>;
896 reg = <0x01c21000 0x400>;
904 pinctrl-0 = <&spdif_tx_pin>;
911 reg = <0x01c21800 0x400>;
918 #sound-dai-cells = <0>;
921 reg = <0x01c22000 0x400>;
932 #sound-dai-cells = <0>;
935 reg = <0x01c22400 0x400>;
946 #sound-dai-cells = <0>;
949 reg = <0x01c22800 0x400>;
960 #sound-dai-cells = <0>;
962 reg = <0x01c22c00 0x200>;
976 reg = <0x01c22e00 0x600>;
985 reg = <0x01c25000 0x100>;
997 reg = <0x01c28000 0x400>;
998 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
1008 reg = <0x01c28400 0x400>;
1019 reg = <0x01c28800 0x400>;
1030 reg = <0x01c28c00 0x400>;
1041 reg = <0x01c29000 0x400>;
1052 reg = <0x01c2ac00 0x400>;
1057 pinctrl-0 = <&i2c0_pins>;
1060 #size-cells = <0>;
1065 reg = <0x01c2b000 0x400>;
1070 pinctrl-0 = <&i2c1_pins>;
1073 #size-cells = <0>;
1078 reg = <0x01c2b400 0x400>;
1083 pinctrl-0 = <&i2c2_pins>;
1086 #size-cells = <0>;
1091 reg = <0x01c68000 0x1000>;
1098 pinctrl-0 = <&spi0_pins>;
1103 #size-cells = <0>;
1108 reg = <0x01c69000 0x1000>;
1115 pinctrl-0 = <&spi1_pins>;
1120 #size-cells = <0>;
1126 reg = <0x01c30000 0x10000>;
1138 #size-cells = <0>;
1144 reg = <0x01c40000 0x10000>;
1167 reg = <0x01c81000 0x1000>,
1168 <0x01c82000 0x2000>,
1169 <0x01c84000 0x2000>,
1170 <0x01c86000 0x2000>;
1179 reg = <0x01c21400 0x400>;
1182 pinctrl-0 = <&pwm_pin>;
1189 reg = <0x01c62000 0x1000>,
1190 <0x01c63000 0x1000>;
1199 dma-ranges = <0x00000000 0x40000000 0xc0000000>;
1205 reg = <0x01cb0000 0x1000>;
1213 pinctrl-0 = <&csi_pins>;
1219 reg = <0x01ca0000 0x1000>;
1227 #size-cells = <0>;
1239 reg = <0x01ca1000 0x1000>;
1246 #phy-cells = <0>;
1252 reg = <0x01e00000 0x20000>;
1266 reg = <0x01ee0000 0x10000>;
1280 #size-cells = <0>;
1282 hdmi_in: port@0 {
1283 reg = <0>;
1298 reg = <0x01ef0000 0x10000>;
1301 clock-names = "bus", "mod", "pll-0";
1304 #phy-cells = <0>;
1310 reg = <0x01f00000 0x400>;
1324 reg = <0x01f00c00 0x400>;
1330 reg = <0x01f01400 0x100>;
1340 reg = <0x01f015c0 0x4>;
1347 reg = <0x01f02400 0x400>;
1353 #size-cells = <0>;
1359 reg = <0x01f02000 0x400>;
1365 pinctrl-0 = <&r_ir_rx_pin>;
1372 reg = <0x01f03800 0x400>;
1375 pinctrl-0 = <&r_pwm_pin>;
1382 reg = <0x01f02c00 0x400>;
1415 reg = <0x01f03400 0x400>;
1421 pinctrl-0 = <&r_rsb_pins>;
1424 #size-cells = <0>;