Lines Matching +full:fixed +full:- +full:mmio +full:- +full:clock
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/sun50i-a100-ccu.h>
8 #include <dt-bindings/clock/sun50i-a100-r-ccu.h>
9 #include <dt-bindings/reset/sun50i-a100-ccu.h>
10 #include <dt-bindings/reset/sun50i-a100-r-ccu.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "arm,cortex-a53";
25 enable-method = "psci";
29 compatible = "arm,cortex-a53";
32 enable-method = "psci";
36 compatible = "arm,cortex-a53";
39 enable-method = "psci";
43 compatible = "arm,cortex-a53";
46 enable-method = "psci";
51 compatible = "arm,cortex-a53-pmu";
56 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
60 compatible = "arm,psci-1.0";
64 dcxo24M: dcxo24M-clk {
65 compatible = "fixed-clock";
66 clock-frequency = <24000000>;
67 clock-output-names = "dcxo24M";
68 #clock-cells = <0>;
71 iosc: internal-osc-clk {
72 compatible = "fixed-clock";
73 clock-frequency = <16000000>;
74 clock-accuracy = <300000000>;
75 clock-output-names = "iosc";
76 #clock-cells = <0>;
79 osc32k: osc32k-clk {
80 compatible = "fixed-clock";
81 clock-frequency = <32768>;
82 clock-output-names = "osc32k";
83 #clock-cells = <0>;
87 compatible = "arm,armv8-timer";
99 compatible = "simple-bus";
100 #address-cells = <1>;
101 #size-cells = <1>;
105 compatible = "allwinner,sun50i-a100-system-control",
106 "allwinner,sun50i-a64-system-control";
108 #address-cells = <1>;
109 #size-cells = <1>;
113 compatible = "mmio-sram";
115 #address-cells = <1>;
116 #size-cells = <1>;
121 compatible = "mmio-sram";
123 #address-cells = <1>;
124 #size-cells = <1>;
129 compatible = "mmio-sram";
131 #address-cells = <1>;
132 #size-cells = <1>;
137 ccu: clock@3001000 {
138 compatible = "allwinner,sun50i-a100-ccu";
141 clock-names = "hosc", "losc", "iosc";
142 #clock-cells = <1>;
143 #reset-cells = <1>;
146 dma: dma-controller@3002000 {
147 compatible = "allwinner,sun50i-a100-dma";
151 clock-names = "bus", "mbus";
153 dma-channels = <8>;
154 dma-requests = <52>;
155 #dma-cells = <1>;
158 gic: interrupt-controller@3021000 {
159 compatible = "arm,gic-400";
164 interrupt-controller;
165 #interrupt-cells = <3>;
169 compatible = "allwinner,sun50i-a100-sid",
170 "allwinner,sun50i-a64-sid";
172 #address-cells = <1>;
173 #size-cells = <1>;
181 compatible = "allwinner,sun50i-a100-wdt",
182 "allwinner,sun6i-a31-wdt";
189 compatible = "allwinner,sun50i-a100-pinctrl";
199 clock-names = "apb", "hosc", "losc";
200 gpio-controller;
201 #gpio-cells = <3>;
202 interrupt-controller;
203 #interrupt-cells = <3>;
205 mmc0_pins: mmc0-pins {
209 drive-strength = <30>;
210 bias-pull-up;
213 /omit-if-no-ref/
214 mmc1_pins: mmc1-pins {
218 drive-strength = <30>;
219 bias-pull-up;
222 mmc2_pins: mmc2-pins {
227 drive-strength = <30>;
228 bias-pull-up;
231 uart0_pb_pins: uart0-pb-pins {
238 compatible = "allwinner,sun50i-a100-mmc";
241 clock-names = "ahb", "mmc";
243 reset-names = "ahb";
245 pinctrl-names = "default";
246 pinctrl-0 = <&mmc0_pins>;
248 #address-cells = <1>;
249 #size-cells = <0>;
253 compatible = "allwinner,sun50i-a100-mmc";
256 clock-names = "ahb", "mmc";
258 reset-names = "ahb";
260 pinctrl-names = "default";
261 pinctrl-0 = <&mmc1_pins>;
263 #address-cells = <1>;
264 #size-cells = <0>;
268 compatible = "allwinner,sun50i-a100-emmc";
271 clock-names = "ahb", "mmc";
273 reset-names = "ahb";
275 pinctrl-names = "default";
276 pinctrl-0 = <&mmc2_pins>;
278 #address-cells = <1>;
279 #size-cells = <0>;
283 compatible = "snps,dw-apb-uart";
286 reg-shift = <2>;
287 reg-io-width = <4>;
294 compatible = "snps,dw-apb-uart";
297 reg-shift = <2>;
298 reg-io-width = <4>;
305 compatible = "snps,dw-apb-uart";
308 reg-shift = <2>;
309 reg-io-width = <4>;
316 compatible = "snps,dw-apb-uart";
319 reg-shift = <2>;
320 reg-io-width = <4>;
327 compatible = "snps,dw-apb-uart";
330 reg-shift = <2>;
331 reg-io-width = <4>;
338 compatible = "allwinner,sun50i-a100-i2c",
339 "allwinner,sun8i-v536-i2c",
340 "allwinner,sun6i-a31-i2c";
346 dma-names = "rx", "tx";
348 #address-cells = <1>;
349 #size-cells = <0>;
353 compatible = "allwinner,sun50i-a100-i2c",
354 "allwinner,sun8i-v536-i2c",
355 "allwinner,sun6i-a31-i2c";
361 dma-names = "rx", "tx";
363 #address-cells = <1>;
364 #size-cells = <0>;
368 compatible = "allwinner,sun50i-a100-i2c",
369 "allwinner,sun8i-v536-i2c",
370 "allwinner,sun6i-a31-i2c";
376 dma-names = "rx", "tx";
378 #address-cells = <1>;
379 #size-cells = <0>;
383 compatible = "allwinner,sun50i-a100-i2c",
384 "allwinner,sun8i-v536-i2c",
385 "allwinner,sun6i-a31-i2c";
391 dma-names = "rx", "tx";
393 #address-cells = <1>;
394 #size-cells = <0>;
397 ths: thermal-sensor@5070400 {
398 compatible = "allwinner,sun50i-a100-ths";
402 clock-names = "bus";
404 nvmem-cells = <&ths_calibration>;
405 nvmem-cell-names = "calibration";
406 #thermal-sensor-cells = <1>;
410 compatible = "allwinner,sun50i-a100-musb",
411 "allwinner,sun8i-a33-musb";
416 interrupt-names = "mc";
418 phy-names = "usb";
424 compatible = "allwinner,sun50i-a100-usb-phy",
425 "allwinner,sun20i-d1-usb-phy";
429 reg-names = "phy_ctrl",
434 clock-names = "usb0_phy",
438 reset-names = "usb0_reset",
441 #phy-cells = <1>;
445 compatible = "allwinner,sun50i-a100-ehci",
446 "generic-ehci";
455 phy-names = "usb";
460 compatible = "allwinner,sun50i-a100-ohci",
461 "generic-ohci";
468 phy-names = "usb";
473 compatible = "allwinner,sun50i-a100-ehci",
474 "generic-ehci";
483 phy-names = "usb";
488 compatible = "allwinner,sun50i-a100-ohci",
489 "generic-ohci";
496 phy-names = "usb";
500 r_ccu: clock@7010000 {
501 compatible = "allwinner,sun50i-a100-r-ccu";
505 clock-names = "hosc", "losc", "iosc", "pll-periph";
506 #clock-cells = <1>;
507 #reset-cells = <1>;
510 r_intc: interrupt-controller@7010320 {
511 compatible = "allwinner,sun50i-a100-nmi",
512 "allwinner,sun9i-a80-nmi";
513 interrupt-controller;
514 #interrupt-cells = <2>;
520 compatible = "allwinner,sun50i-a100-r-pinctrl";
524 clock-names = "apb", "hosc", "losc";
525 gpio-controller;
526 #gpio-cells = <3>;
527 interrupt-controller;
528 #interrupt-cells = <3>;
530 r_i2c0_pins: r-i2c0-pins {
535 r_i2c1_pins: r-i2c1-pins {
542 compatible = "snps,dw-apb-uart";
545 reg-shift = <2>;
546 reg-io-width = <4>;
553 compatible = "allwinner,sun50i-a100-i2c",
554 "allwinner,sun8i-v536-i2c",
555 "allwinner,sun6i-a31-i2c";
561 dma-names = "rx", "tx";
562 pinctrl-names = "default";
563 pinctrl-0 = <&r_i2c0_pins>;
565 #address-cells = <1>;
566 #size-cells = <0>;
570 compatible = "allwinner,sun50i-a100-i2c",
571 "allwinner,sun8i-v536-i2c",
572 "allwinner,sun6i-a31-i2c";
578 dma-names = "rx", "tx";
579 pinctrl-names = "default";
580 pinctrl-0 = <&r_i2c1_pins>;
582 #address-cells = <1>;
583 #size-cells = <0>;
587 thermal-zones {
588 cpu-thermal {
589 polling-delay-passive = <0>;
590 polling-delay = <0>;
591 thermal-sensors = <&ths 0>;
594 ddr-thermal {
595 polling-delay-passive = <0>;
596 polling-delay = <0>;
597 thermal-sensors = <&ths 2>;
600 gpu-thermal {
601 polling-delay-passive = <0>;
602 polling-delay = <0>;
603 thermal-sensors = <&ths 1>;