Lines Matching +full:tlb +full:- +full:split
1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1997-2002 Russell King
7 * ARM architecture version 4 TLB handling functions.
8 * These assume a split I/D TLBs w/o I TLB entry, with a write buffer.
16 #include <asm/asm-offsets.h>
18 #include "proc-macros.S"
24 * Invalidate a range of TLB entries in the specified address space.
26 * - start - range start address
27 * - end - range end address
28 * - mm - mm_struct describing address space
33 act_mm r3 @ get current->active_mm
39 mcrne p15, 0, r3, c8, c5, 0 @ invalidate I TLB
42 1: mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry
52 * Invalidate a range of TLB entries in the specified kernel
55 * - start - virtual address (may not be aligned)
56 * - end - virtual address (may not be aligned)
63 mcr p15, 0, r3, c8, c5, 0 @ invalidate I TLB
64 1: mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry