Lines Matching +full:prefetch +full:- +full:dma
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/proc-xsc3.S
15 * - ARMv6 Supersections
16 * - Low Locality Reference pages (replaces mini-cache)
17 * - 36-bit addressing
18 * - L2 cache
19 * - Cache coherency if chipset supports it
30 #include <asm/pgtable-hwdef.h>
33 #include "proc-macros.S"
178 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
188 * - start - start address (may not be aligned)
189 * - end - end address (exclusive, may not be aligned)
190 * - vma - vma_area_struct describing address space
208 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
216 * region described by start. If you have non-snooping
219 * - start - virtual start address
220 * - end - virtual end address
222 * Note: single I-cache line invalidation isn't used here since
223 * it also trashes the mini I-cache used by JTAG debuggers.
232 bic r0, r0, #CACHELINESIZE - 1
240 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
250 * - addr - kernel address
251 * - size - region size
262 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
274 * - start - virtual start address
275 * - end - virtual end address
278 tst r0, #CACHELINESIZE - 1
279 bic r0, r0, #CACHELINESIZE - 1
281 tst r1, #CACHELINESIZE - 1
295 * - start - virtual start address
296 * - end - virtual end address
299 bic r0, r0, #CACHELINESIZE - 1
312 * - start - virtual start address
313 * - end - virtual end address
316 bic r0, r0, #CACHELINESIZE - 1
327 * - start - kernel virtual start address
328 * - size - size of region
329 * - dir - DMA direction
341 * - start - kernel virtual start address
342 * - size - size of region
343 * - dir - DMA direction
371 mcr p15, 0, ip, c7, c5, 4 @ prefetch flush
424 stmfd sp!, {r4 - r9, lr}
432 stmia r0, {r4 - r9} @ store cp regs
433 ldmia sp!, {r4 - r9, pc}
437 ldmia r0, {r4 - r9} @ load cp regs
441 mcr p15, 0, ip, c7, c5, 4 @ flush prefetch buffer
461 mcr p15, 0, ip, c7, c5, 4 @ prefetch flush
489 .size __xsc3_setup, . - __xsc3_setup
497 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
504 string cpu_xsc3_name, "XScale-V3 based processor"
532 .size __\name\()_proc_info, . - __\name\()_proc_info