Lines Matching +full:sysc +full:- +full:omap2
1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips
5 * Copyright (C) 2009-2011 Nokia Corporation
12 * XXX these should be marked initdata for multi-OMAP kernels
15 #include <linux/platform_data/i2c-omap.h>
17 #include <linux/platform_data/hsmmc-omap.h>
25 #include "prm-regbits-34xx.h"
26 #include "cm-regbits-34xx.h"
36 * is driver-specific or driver-kernel integration-specific belongs
105 .omap2 = {
146 .sysc = &omap3xxx_timer_sysc,
154 .omap2 = {
169 .omap2 = {
184 .omap2 = {
199 .omap2 = {
214 .omap2 = {
229 .omap2 = {
244 .omap2 = {
259 .omap2 = {
274 .omap2 = {
286 * 32-bit watchdog upward counter that generates a pulse on the reset pin on
316 .sysc = &omap3xxx_wd_timer_sysc,
326 .omap2 = {
345 .omap2 = {
360 .omap2 = {
376 .omap2 = {
393 .omap2 = {
422 .omap2 = {
436 .sysc = &i2c_sysc,
457 .omap2 = {
473 .omap2 = {
502 .sysc = &omap3_dispc_sysc,
510 .omap2 = {
536 .sysc = &omap3xxx_dsi_sysc,
549 .omap2 = {
567 .omap2 = {
586 .omap2 = {
601 .omap2 = {
616 .omap2 = {
631 .omap2 = {
658 .sysc = &omap3xxx_gpio_sysc,
673 .omap2 = {
694 .omap2 = {
715 .omap2 = {
736 .omap2 = {
758 .omap2 = {
780 .omap2 = {
795 .rev_offs = -ENODEV,
805 .sysc = &omap3xxx_mcbsp_sysc,
825 .omap2 = {
841 .omap2 = {
857 .omap2 = {
873 .omap2 = {
889 .omap2 = {
901 .rev_offs = -ENODEV,
909 .sysc = &omap3xxx_mcbsp_sidetone_sysc,
930 .rev_offs = -ENODEV,
938 .sysc = &omap34xx_sr_sysc,
942 .rev_offs = -ENODEV,
952 .sysc = &omap36xx_sr_sysc,
966 .omap2 = {
981 .omap2 = {
1001 .omap2 = {
1016 .omap2 = {
1027 * mailbox module allowing communication between the on-chip processors
1028 * using a queued mailbox-interrupt mechanism.
1043 .sysc = &omap3xxx_mailbox_sysc,
1051 .omap2 = {
1078 .sysc = &omap34xx_mcspi_sysc,
1086 .omap2 = {
1100 .omap2 = {
1114 .omap2 = {
1128 .omap2 = {
1151 .sysc = &omap34xx_mmc_sysc,
1178 .omap2 = {
1194 .omap2 = {
1223 .omap2 = {
1239 .omap2 = {
1262 .omap2 = {
1273 * high-speed multi-port usb host controller
1291 .sysc = &omap3xxx_usb_host_hs_sysc,
1301 .omap2 = {
1309 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
1314 * - USBHOST module is set to smart-idle mode
1315 * - PRCM asserts idle_req to the USBHOST module ( This typically
1319 * - an USBHOST interrupt occurs before the module is able to answer
1329 * Errata: USB host EHCI may stall when entering smart-standby mode
1333 * When the USBHOST module is set to smart-standby mode, and when it is
1366 .sysc = &omap3xxx_usb_tll_hs_sysc,
1376 .omap2 = {
1388 .omap2 = {
1413 .omap2 = {
1439 .sysc = &omap3xxx_gpmc_sysc,
1455 /* L3 -> L4_CORE interface */
1462 /* L3 -> L4_PER interface */
1470 /* MPU -> L3 interface */
1478 /* l3 -> debugss */
1485 /* DSS -> l3 */
1496 .omap2 = {
1504 /* l3_core -> sad2d interface */
1512 /* L4_CORE -> L4_WKUP interface */
1519 /* L4 CORE -> MMC1 interface */
1536 /* L4 CORE -> MMC2 interface */
1553 /* L4 CORE -> MMC3 interface */
1563 /* L4 CORE -> UART1 interface */
1572 /* L4 CORE -> UART2 interface */
1581 /* L4 PER -> UART3 interface */
1590 /* L4 PER -> UART4 interface */
1599 /* AM35xx: L4 CORE -> UART4 interface */
1608 /* L4 CORE -> I2C1 interface */
1614 .omap2 = {
1623 /* L4 CORE -> I2C2 interface */
1629 .omap2 = {
1638 /* L4 CORE -> I2C3 interface */
1645 .omap2 = {
1654 /* L4 CORE -> SR1 interface */
1669 /* L4 CORE -> SR2 interface */
1685 /* L4_WKUP -> L4_SEC interface */
1692 /* IVA2 <- L3 interface */
1700 /* l4_per -> timer3 */
1709 /* l4_per -> timer4 */
1718 /* l4_per -> timer5 */
1727 /* l4_per -> timer6 */
1736 /* l4_per -> timer7 */
1745 /* l4_per -> timer8 */
1754 /* l4_per -> timer9 */
1762 /* l4_core -> timer10 */
1770 /* l4_core -> timer11 */
1778 /* l4_wkup -> wd_timer2 */
1787 /* l4_core -> dss */
1793 .omap2 = {
1807 .omap2 = {
1816 /* l4_core -> dss_dispc */
1822 .omap2 = {
1831 /* l4_core -> dss_dsi1 */
1837 .omap2 = {
1846 /* l4_core -> dss_rfbi */
1852 .omap2 = {
1861 /* l4_core -> dss_venc */
1867 .omap2 = {
1877 /* l4_wkup -> gpio1 */
1885 /* l4_per -> gpio2 */
1893 /* l4_per -> gpio3 */
1919 .sysc = &mmu_sysc,
1925 /* l4_core -> mmu isp */
1947 /* l3_main -> iva mmu */
1962 .omap2 = {
1971 /* l4_per -> gpio4 */
1979 /* l4_per -> gpio5 */
1987 /* l4_per -> gpio6 */
1995 /* l4_core -> mcbsp1 */
2004 /* l4_per -> mcbsp2 */
2013 /* l4_per -> mcbsp3 */
2022 /* l4_per -> mcbsp4 */
2031 /* l4_core -> mcbsp5 */
2040 /* l4_per -> mcbsp2_sidetone */
2049 /* l4_per -> mcbsp3_sidetone */
2057 /* l4_core -> mailbox */
2064 /* l4 core -> mcspi1 interface */
2072 /* l4 core -> mcspi2 interface */
2080 /* l4 core -> mcspi3 interface */
2088 /* l4 core -> mcspi4 interface */
2120 /* l4_core -> hdq1w interface */
2143 * so is left as a future to-do item.
2152 /* l4_core -> davinci mdio */
2156 * so is left as a future to-do item.
2175 * https://lore.kernel.org/all/1336770778-23044-3-git-send-email-[email protected]/
2180 /* l3_core -> davinci emac interface */
2184 * so is left as a future to-do item.
2193 /* l4_core -> davinci emac */
2197 * so is left as a future to-do item.
2213 /* l4_core -> SHAM2 (SHA1/MD5) (similar to omap24xx) */
2225 .sysc = &omap3_sham_sysc,
2234 .omap2 = {
2253 * synchronous serial interface (multichannel and full-duplex serial if)
2268 .sysc = &omap34xx_ssi_sysc,
2277 .omap2 = {
2285 /* L4 CORE -> SSI */
2362 /* 3430ES1-only hwmod links */
2369 /* 3430ES2+-only hwmod links */
2379 /* <= 3430ES3-only hwmod links */
2386 /* 3430ES3+-only hwmod links */
2393 /* 34xx-only hwmod links (all ES revisions) */
2407 /* 36xx-only hwmod links (all ES revisions) */
2455 * omap3xxx_hwmod_is_hs_ip_block_usable - is a security IP block accessible?
2456 * @bus: struct device_node * for the top-level OMAP DT data
2463 * fused as a 'general-purpose' SoC. If however DT data is present,
2522 return -EINVAL; in omap3xxx_hwmod_init()
2585 * long-term fix to this is to ensure hwmods are set up in in omap3xxx_hwmod_init()