Lines Matching +full:0 +full:x10 +full:- +full:0 +full:x14
1 /* SPDX-License-Identifier: GPL-2.0 */
14 * (x8, x9) to the stack and swap them out with (x10, x11). This adds one
24 * similarly for row 'd'. (brot, drot) start out as (0, 0) but we make it such
37 X8_X10 .req r8 // shared by x8 and x10
41 X14 .req r12
78 // drot == 32 - 16 == 16
85 // brot == 32 - 12 == 20
92 // drot == 32 - 8 == 24
99 // brot == 32 - 7 == 25
109 // save (x8, x9); restore (x10, x11)
110 __strd X8_X10, X9_X11, sp, 0
113 // quarterrounds: (x2, x6, x10, x14) and (x3, x7, x11, x15)
114 _halfround X2, X6, X8_X10, X14, X3, X7, X9_X11, X15
121 // quarterrounds: (x0, x5, x10, x15) and (x1, x6, x11, x12)
124 // save (x10, x11); restore (x8, x9)
126 __ldrd X8_X10, X9_X11, sp, 0
128 // quarterrounds: (x2, x7, x8, x13) and (x3, x4, x9, x14)
129 _halfround X2, X7, X8_X10, X13, X3, X4, X9_X11, X14
133 .set brot, 0
134 .set drot, 0
143 // Stack: unused0-unused1 x10-x11 x0-x15 OUT IN LEN
144 // Registers contain x0-x9,x12-x15.
146 // Do the core ChaCha permutation to update x0-x15.
150 // Stack: x10-x11 orig_x0-orig_x15 OUT IN LEN
151 // Registers contain x0-x9,x12-x15.
152 // x4-x7 are rotated by 'brot'; x12-x15 are rotated by 'drot'.
154 // Free up some registers (r8-r12,r14) by pushing (x8-x9,x12-x15).
155 push {X8_X10, X9_X11, X12, X13, X14, X15}
168 // Use slow path if IN and/or OUT isn't 4-byte aligned. Needed even on
175 // Stack: x8-x9 x12-x15 x10-x11 orig_x0-orig_x15 OUT IN LEN
176 // Registers: r0-r7 are x0-x7; r8-r11 are free; r12 is IN; r14 is OUT.
177 // x4-x7 are rotated by 'brot'; x12-x15 are rotated by 'drot'.
179 // x0-x3
187 ldmia r12!, {r8-r11}
192 stmia r14!, {X0-X3}
194 // x4-x7
199 ldmia r12!, {X0-X3}
207 stmia r14!, {X4-X7}
209 // x8-x15
210 pop {r0-r7} // (x8-x9,x12-x15,x10-x11)
215 add r6, r6, r10 // x10
218 ldmia r12!, {r8-r11}
221 eor r6, r6, r10 // x10
229 add r4, r10, r4, ror #drot // x14
235 eor r4, r4, r6 // x14
238 stmia r14!, {r2-r5}
244 // Stack: x0-x15 OUT IN LEN
262 ldmia r14!, {r0-r11} // load x0-x11
263 __strd r10, r11, sp, 8 // store x10-x11 before state
264 ldmia r14, {r10-r12,r14} // load x12-x15
270 // XOR-ing the needed portion with the data.
276 // Stack: ks0-ks15 x8-x9 x12-x15 x10-x11 orig_x0-orig_x15 OUT IN LEN
277 // Registers: r0-r7 are x0-x7; r8-r11 are free; r12 is IN; r14 is &ks0.
278 // x4-x7 are rotated by 'brot'; x12-x15 are rotated by 'drot'.
280 // Save keystream for x0-x3
288 stmia r14!, {X0-X3}
290 // Save keystream for x4-x7
299 stmia r14!, {X4-X7}
301 // Save keystream for x8-x15
302 ldm r8, {r0-r7} // (x8-x9,x12-x15,x10-x11)
307 add r6, r6, r10 // x10
315 add r4, r10, r4, ror #drot // x14
318 stmia r14, {r2-r5}
320 // Stack: ks0-ks15 unused0-unused7 x0-x15 OUT IN LEN
373 cmp r2, #0 // len == 0?
379 push {r0-r2,r4-r11,lr}
381 // Push state x0-x15 onto stack.
382 // Also store an extra copy of x10-x11 just before the state.
385 ldm X12, {X12,X13,X14,X15}
386 push {X12,X13,X14,X15}
392 ldm r3, {X0-X9_X11}
402 0: add sp, #76
403 pop {r4-r11, pc}
406 b 0b
413 push {r1,r4-r11,lr}
418 ldmia r14!, {r0-r11} // load x0-x11
419 push {r10-r11} // store x10-x11 to stack
420 ldm r14, {r10-r12,r14} // load x12-x15
426 // Skip over (unused0-unused1, x10-x11)
427 0: add sp, #16
429 // Fix up rotations of x12-x15
433 ror X14, X14, #drot
436 // Store (x0-x3,x12-x15) to 'out'
437 stm r4, {X0,X1,X2,X3,X12,X13,X14,X15}
439 pop {r4-r11,pc}
442 b 0b