Lines Matching +full:gate +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree Source for OMAP3 clock data
9 #clock-cells = <0>;
10 compatible = "ti,am35xx-gate-clock";
13 ti,bit-shift = <1>;
17 #clock-cells = <0>;
18 compatible = "ti,gate-clock";
21 ti,bit-shift = <9>;
25 #clock-cells = <0>;
26 compatible = "ti,am35xx-gate-clock";
29 ti,bit-shift = <2>;
33 #clock-cells = <0>;
34 compatible = "ti,gate-clock";
37 ti,bit-shift = <10>;
41 #clock-cells = <0>;
42 compatible = "ti,am35xx-gate-clock";
45 ti,bit-shift = <0>;
49 #clock-cells = <0>;
50 compatible = "ti,gate-clock";
53 ti,bit-shift = <8>;
57 #clock-cells = <0>;
58 compatible = "ti,am35xx-gate-clock";
61 ti,bit-shift = <3>;
65 clock@a10 {
68 #clock-cells = <2>;
69 #address-cells = <1>;
70 #size-cells = <0>;
72 ipss_ick: clock-ipss-ick@4 {
74 #clock-cells = <0>;
75 compatible = "ti,am35xx-interface-clock";
76 clock-output-names = "ipss_ick";
80 uart4_ick_am35xx: clock-uart4-ick-am35xx@23 {
82 #clock-cells = <0>;
83 compatible = "ti,omap3-interface-clock";
84 clock-output-names = "uart4_ick_am35xx";
90 #clock-cells = <0>;
91 compatible = "fixed-clock";
92 clock-frequency = <50000000>;
96 #clock-cells = <0>;
97 compatible = "fixed-clock";
98 clock-frequency = <27000000>;
101 clock@a00 {
104 #clock-cells = <2>;
105 #address-cells = <1>;
106 #size-cells = <0>;
108 uart4_fck_am35xx: clock-uart4-fck-am35xx@23 {
110 #clock-cells = <0>;
111 compatible = "ti,wait-gate-clock";
112 clock-output-names = "uart4_fck_am35xx";