Lines Matching +full:stm32 +full:- +full:exti
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
20 clock-frequency = <650000000>;
26 arm-pmu {
27 compatible = "arm,cortex-a7-pmu";
29 interrupt-affinity = <&cpu0>;
30 interrupt-parent = <&intc>;
34 compatible = "arm,psci-1.0";
38 intc: interrupt-controller@a0021000 {
39 compatible = "arm,cortex-a7-gic";
40 #interrupt-cells = <3>;
41 interrupt-controller;
47 compatible = "arm,armv7-timer";
52 interrupt-parent = <&intc>;
53 arm,no-tick-in-suspend;
57 clk_hse: clk-hse {
58 #clock-cells = <0>;
59 compatible = "fixed-clock";
60 clock-frequency = <24000000>;
63 clk_hsi: clk-hsi {
64 #clock-cells = <0>;
65 compatible = "fixed-clock";
66 clock-frequency = <64000000>;
69 clk_lse: clk-lse {
70 #clock-cells = <0>;
71 compatible = "fixed-clock";
72 clock-frequency = <32768>;
75 clk_lsi: clk-lsi {
76 #clock-cells = <0>;
77 compatible = "fixed-clock";
78 clock-frequency = <32000>;
81 clk_csi: clk-csi {
82 #clock-cells = <0>;
83 compatible = "fixed-clock";
84 clock-frequency = <4000000>;
88 thermal-zones {
89 cpu_thermal: cpu-thermal {
90 polling-delay-passive = <0>;
91 polling-delay = <0>;
92 thermal-sensors = <&dts>;
95 cpu_alert1: cpu-alert1 {
101 cpu-crit {
108 cooling-maps {
113 booster: regulator-booster {
114 compatible = "st,stm32mp1-booster";
120 compatible = "simple-bus";
121 #address-cells = <1>;
122 #size-cells = <1>;
123 interrupt-parent = <&intc>;
127 compatible = "st,stm32mp1-ipcc";
128 #mbox-cells = <1>;
130 st,proc-id = <0>;
131 interrupts-extended =
132 <&exti 61 IRQ_TYPE_LEVEL_HIGH>,
134 interrupt-names = "rx", "tx";
136 wakeup-source;
141 compatible = "st,stm32mp1-rcc", "syscon";
143 #clock-cells = <1>;
144 #reset-cells = <1>;
148 compatible = "st,stm32mp1,pwr-reg";
152 regulator-name = "reg11";
153 regulator-min-microvolt = <1100000>;
154 regulator-max-microvolt = <1100000>;
158 regulator-name = "reg18";
159 regulator-min-microvolt = <1800000>;
160 regulator-max-microvolt = <1800000>;
164 regulator-name = "usb33";
165 regulator-min-microvolt = <3300000>;
166 regulator-max-microvolt = <3300000>;
171 compatible = "st,stm32mp151-pwr-mcu", "syscon";
175 exti: interrupt-controller@5000d000 { label
176 compatible = "st,stm32mp1-exti", "syscon";
177 interrupt-controller;
178 #interrupt-cells = <2>;
180 interrupts-extended =
258 compatible = "st,stm32mp157-syscfg", "syscon";
264 compatible = "st,stm32-thermal";
268 clock-names = "pclk";
269 #thermal-sensor-cells = <0>;
273 mdma1: dma-controller@58000000 {
274 compatible = "st,stm32h7-mdma";
279 #dma-cells = <5>;
280 dma-channels = <32>;
281 dma-requests = <48>;
285 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
286 arm,primecell-periphid = <0x00253180>;
290 clock-names = "apb_pclk";
292 cap-sd-highspeed;
293 cap-mmc-highspeed;
294 max-frequency = <120000000>;
299 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
300 arm,primecell-periphid = <0x00253180>;
304 clock-names = "apb_pclk";
306 cap-sd-highspeed;
307 cap-mmc-highspeed;
308 max-frequency = <120000000>;
313 compatible = "st,stm32f7-crc";
320 compatible = "generic-ohci";
326 phy-names = "usb";
331 compatible = "generic-ehci";
338 phy-names = "usb";
342 ltdc: display-controller@5a001000 {
343 compatible = "st,stm32-ltdc";
348 clock-names = "lcd";
354 compatible = "st,stm32mp1-iwdg";
357 clock-names = "pclk", "lsi";
358 interrupts-extended = <&exti 46 IRQ_TYPE_LEVEL_HIGH>;
359 wakeup-source;
364 #address-cells = <1>;
365 #size-cells = <0>;
366 #clock-cells = <0>;
367 compatible = "st,stm32mp1-usbphyc";
371 vdda1v1-supply = <®11>;
372 vdda1v8-supply = <®18>;
375 usbphyc_port0: usb-phy@0 {
376 #phy-cells = <0>;
380 usbphyc_port1: usb-phy@1 {
381 #phy-cells = <1>;
387 compatible = "st,stm32mp1-rtc";
390 clock-names = "pclk", "rtc_ck";
391 interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;
396 compatible = "st,stm32mp15-bsec";
398 #address-cells = <1>;
399 #size-cells = <1>;
400 part_number_otp: part-number-otp@4 {
403 vrefint: vrefin-cal@52 {
415 compatible = "st,stm32-etzpc", "simple-bus";
417 #address-cells = <1>;
418 #size-cells = <1>;
419 #access-controller-cells = <1>;
423 #address-cells = <1>;
424 #size-cells = <0>;
425 compatible = "st,stm32-timers";
428 interrupt-names = "global";
430 clock-names = "int";
436 dma-names = "ch1", "ch2", "ch3", "ch4", "up";
437 access-controllers = <&etzpc 16>;
441 compatible = "st,stm32-pwm";
442 #pwm-cells = <3>;
447 compatible = "st,stm32h7-timer-trigger";
453 compatible = "st,stm32-timer-counter";
459 #address-cells = <1>;
460 #size-cells = <0>;
461 compatible = "st,stm32-timers";
464 interrupt-names = "global";
466 clock-names = "int";
473 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
474 access-controllers = <&etzpc 17>;
478 compatible = "st,stm32-pwm";
479 #pwm-cells = <3>;
484 compatible = "st,stm32h7-timer-trigger";
490 compatible = "st,stm32-timer-counter";
496 #address-cells = <1>;
497 #size-cells = <0>;
498 compatible = "st,stm32-timers";
501 interrupt-names = "global";
503 clock-names = "int";
508 dma-names = "ch1", "ch2", "ch3", "ch4";
509 access-controllers = <&etzpc 18>;
513 compatible = "st,stm32-pwm";
514 #pwm-cells = <3>;
519 compatible = "st,stm32h7-timer-trigger";
525 compatible = "st,stm32-timer-counter";
531 #address-cells = <1>;
532 #size-cells = <0>;
533 compatible = "st,stm32-timers";
536 interrupt-names = "global";
538 clock-names = "int";
545 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
546 access-controllers = <&etzpc 19>;
550 compatible = "st,stm32-pwm";
551 #pwm-cells = <3>;
556 compatible = "st,stm32h7-timer-trigger";
562 compatible = "st,stm32-timer-counter";
568 #address-cells = <1>;
569 #size-cells = <0>;
570 compatible = "st,stm32-timers";
573 interrupt-names = "global";
575 clock-names = "int";
577 dma-names = "up";
578 access-controllers = <&etzpc 20>;
582 compatible = "st,stm32-timer-counter";
587 compatible = "st,stm32h7-timer-trigger";
594 #address-cells = <1>;
595 #size-cells = <0>;
596 compatible = "st,stm32-timers";
599 interrupt-names = "global";
601 clock-names = "int";
603 dma-names = "up";
604 access-controllers = <&etzpc 21>;
608 compatible = "st,stm32-timer-counter";
613 compatible = "st,stm32h7-timer-trigger";
620 #address-cells = <1>;
621 #size-cells = <0>;
622 compatible = "st,stm32-timers";
625 interrupt-names = "global";
627 clock-names = "int";
628 access-controllers = <&etzpc 22>;
632 compatible = "st,stm32-timer-counter";
637 compatible = "st,stm32-pwm";
638 #pwm-cells = <3>;
643 compatible = "st,stm32h7-timer-trigger";
650 #address-cells = <1>;
651 #size-cells = <0>;
652 compatible = "st,stm32-timers";
655 interrupt-names = "global";
657 clock-names = "int";
658 access-controllers = <&etzpc 23>;
662 compatible = "st,stm32-timer-counter";
667 compatible = "st,stm32-pwm";
668 #pwm-cells = <3>;
673 compatible = "st,stm32h7-timer-trigger";
680 #address-cells = <1>;
681 #size-cells = <0>;
682 compatible = "st,stm32-timers";
685 interrupt-names = "global";
687 clock-names = "int";
688 access-controllers = <&etzpc 24>;
692 compatible = "st,stm32-timer-counter";
697 compatible = "st,stm32-pwm";
698 #pwm-cells = <3>;
703 compatible = "st,stm32h7-timer-trigger";
710 #address-cells = <1>;
711 #size-cells = <0>;
712 compatible = "st,stm32-lptimer";
714 interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
716 clock-names = "mux";
717 wakeup-source;
718 access-controllers = <&etzpc 25>;
722 compatible = "st,stm32-pwm-lp";
723 #pwm-cells = <3>;
728 compatible = "st,stm32-lptimer-trigger";
734 compatible = "st,stm32-lptimer-counter";
739 i2s2: audio-controller@4000b000 {
740 compatible = "st,stm32h7-i2s";
741 #sound-dai-cells = <0>;
746 dma-names = "rx", "tx";
747 access-controllers = <&etzpc 27>;
752 #address-cells = <1>;
753 #size-cells = <0>;
754 compatible = "st,stm32h7-spi";
761 dma-names = "rx", "tx";
762 access-controllers = <&etzpc 27>;
766 i2s3: audio-controller@4000c000 {
767 compatible = "st,stm32h7-i2s";
768 #sound-dai-cells = <0>;
773 dma-names = "rx", "tx";
774 access-controllers = <&etzpc 28>;
779 #address-cells = <1>;
780 #size-cells = <0>;
781 compatible = "st,stm32h7-spi";
788 dma-names = "rx", "tx";
789 access-controllers = <&etzpc 28>;
793 spdifrx: audio-controller@4000d000 {
794 compatible = "st,stm32h7-spdifrx";
795 #sound-dai-cells = <0>;
798 clock-names = "kclk";
802 dma-names = "rx", "rx-ctrl";
803 access-controllers = <&etzpc 29>;
808 compatible = "st,stm32h7-uart";
810 interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
812 wakeup-source;
815 dma-names = "rx", "tx";
816 access-controllers = <&etzpc 30>;
821 compatible = "st,stm32h7-uart";
823 interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>;
825 wakeup-source;
828 dma-names = "rx", "tx";
829 access-controllers = <&etzpc 31>;
834 compatible = "st,stm32h7-uart";
836 interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
838 wakeup-source;
841 dma-names = "rx", "tx";
842 access-controllers = <&etzpc 32>;
847 compatible = "st,stm32h7-uart";
849 interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>;
851 wakeup-source;
854 dma-names = "rx", "tx";
855 access-controllers = <&etzpc 33>;
860 compatible = "st,stm32mp15-i2c";
862 interrupt-names = "event", "error";
867 #address-cells = <1>;
868 #size-cells = <0>;
869 st,syscfg-fmp = <&syscfg 0x4 0x1>;
870 wakeup-source;
871 i2c-analog-filter;
872 access-controllers = <&etzpc 34>;
877 compatible = "st,stm32mp15-i2c";
879 interrupt-names = "event", "error";
884 #address-cells = <1>;
885 #size-cells = <0>;
886 st,syscfg-fmp = <&syscfg 0x4 0x2>;
887 wakeup-source;
888 i2c-analog-filter;
889 access-controllers = <&etzpc 35>;
894 compatible = "st,stm32mp15-i2c";
896 interrupt-names = "event", "error";
901 #address-cells = <1>;
902 #size-cells = <0>;
903 st,syscfg-fmp = <&syscfg 0x4 0x4>;
904 wakeup-source;
905 i2c-analog-filter;
906 access-controllers = <&etzpc 36>;
911 compatible = "st,stm32mp15-i2c";
913 interrupt-names = "event", "error";
918 #address-cells = <1>;
919 #size-cells = <0>;
920 st,syscfg-fmp = <&syscfg 0x4 0x10>;
921 wakeup-source;
922 i2c-analog-filter;
923 access-controllers = <&etzpc 37>;
928 compatible = "st,stm32-cec";
932 clock-names = "cec", "hdmi-cec";
933 access-controllers = <&etzpc 38>;
938 compatible = "st,stm32h7-dac-core";
941 clock-names = "pclk";
942 #address-cells = <1>;
943 #size-cells = <0>;
944 access-controllers = <&etzpc 39>;
948 compatible = "st,stm32-dac";
949 #io-channel-cells = <1>;
955 compatible = "st,stm32-dac";
956 #io-channel-cells = <1>;
963 compatible = "st,stm32h7-uart";
965 interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>;
967 wakeup-source;
970 dma-names = "rx", "tx";
971 access-controllers = <&etzpc 40>;
976 compatible = "st,stm32h7-uart";
978 interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>;
980 wakeup-source;
983 dma-names = "rx", "tx";
984 access-controllers = <&etzpc 41>;
989 #address-cells = <1>;
990 #size-cells = <0>;
991 compatible = "st,stm32-timers";
997 interrupt-names = "brk", "up", "trg-com", "cc";
999 clock-names = "int";
1007 dma-names = "ch1", "ch2", "ch3", "ch4",
1009 access-controllers = <&etzpc 48>;
1013 compatible = "st,stm32-pwm";
1014 #pwm-cells = <3>;
1019 compatible = "st,stm32h7-timer-trigger";
1025 compatible = "st,stm32-timer-counter";
1031 #address-cells = <1>;
1032 #size-cells = <0>;
1033 compatible = "st,stm32-timers";
1039 interrupt-names = "brk", "up", "trg-com", "cc";
1041 clock-names = "int";
1049 dma-names = "ch1", "ch2", "ch3", "ch4",
1051 access-controllers = <&etzpc 49>;
1055 compatible = "st,stm32-pwm";
1056 #pwm-cells = <3>;
1061 compatible = "st,stm32h7-timer-trigger";
1067 compatible = "st,stm32-timer-counter";
1073 compatible = "st,stm32h7-uart";
1075 interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>;
1077 wakeup-source;
1080 dma-names = "rx", "tx";
1081 access-controllers = <&etzpc 51>;
1085 i2s1: audio-controller@44004000 {
1086 compatible = "st,stm32h7-i2s";
1087 #sound-dai-cells = <0>;
1092 dma-names = "rx", "tx";
1093 access-controllers = <&etzpc 52>;
1098 #address-cells = <1>;
1099 #size-cells = <0>;
1100 compatible = "st,stm32h7-spi";
1107 dma-names = "rx", "tx";
1108 access-controllers = <&etzpc 52>;
1113 #address-cells = <1>;
1114 #size-cells = <0>;
1115 compatible = "st,stm32h7-spi";
1122 dma-names = "rx", "tx";
1123 access-controllers = <&etzpc 53>;
1128 #address-cells = <1>;
1129 #size-cells = <0>;
1130 compatible = "st,stm32-timers";
1133 interrupt-names = "global";
1135 clock-names = "int";
1140 dma-names = "ch1", "up", "trig", "com";
1141 access-controllers = <&etzpc 54>;
1145 compatible = "st,stm32-timer-counter";
1150 compatible = "st,stm32-pwm";
1151 #pwm-cells = <3>;
1156 compatible = "st,stm32h7-timer-trigger";
1163 #address-cells = <1>;
1164 #size-cells = <0>;
1165 compatible = "st,stm32-timers";
1168 interrupt-names = "global";
1170 clock-names = "int";
1173 dma-names = "ch1", "up";
1174 access-controllers = <&etzpc 55>;
1178 compatible = "st,stm32-timer-counter";
1183 compatible = "st,stm32-pwm";
1184 #pwm-cells = <3>;
1189 compatible = "st,stm32h7-timer-trigger";
1196 #address-cells = <1>;
1197 #size-cells = <0>;
1198 compatible = "st,stm32-timers";
1201 interrupt-names = "global";
1203 clock-names = "int";
1206 dma-names = "ch1", "up";
1207 access-controllers = <&etzpc 56>;
1211 compatible = "st,stm32-timer-counter";
1216 compatible = "st,stm32-pwm";
1217 #pwm-cells = <3>;
1222 compatible = "st,stm32h7-timer-trigger";
1229 #address-cells = <1>;
1230 #size-cells = <0>;
1231 compatible = "st,stm32h7-spi";
1238 dma-names = "rx", "tx";
1239 access-controllers = <&etzpc 57>;
1244 compatible = "st,stm32h7-sai";
1245 #address-cells = <1>;
1246 #size-cells = <1>;
1251 access-controllers = <&etzpc 58>;
1254 sai1a: audio-controller@4400a004 {
1255 #sound-dai-cells = <0>;
1257 compatible = "st,stm32-sai-sub-a";
1260 clock-names = "sai_ck";
1265 sai1b: audio-controller@4400a024 {
1266 #sound-dai-cells = <0>;
1267 compatible = "st,stm32-sai-sub-b";
1270 clock-names = "sai_ck";
1277 compatible = "st,stm32h7-sai";
1278 #address-cells = <1>;
1279 #size-cells = <1>;
1284 access-controllers = <&etzpc 59>;
1287 sai2a: audio-controller@4400b004 {
1288 #sound-dai-cells = <0>;
1289 compatible = "st,stm32-sai-sub-a";
1292 clock-names = "sai_ck";
1297 sai2b: audio-controller@4400b024 {
1298 #sound-dai-cells = <0>;
1299 compatible = "st,stm32-sai-sub-b";
1302 clock-names = "sai_ck";
1309 compatible = "st,stm32h7-sai";
1310 #address-cells = <1>;
1311 #size-cells = <1>;
1316 access-controllers = <&etzpc 60>;
1319 sai3a: audio-controller@4400c004 {
1320 #sound-dai-cells = <0>;
1321 compatible = "st,stm32-sai-sub-a";
1324 clock-names = "sai_ck";
1329 sai3b: audio-controller@4400c024 {
1330 #sound-dai-cells = <0>;
1331 compatible = "st,stm32-sai-sub-b";
1334 clock-names = "sai_ck";
1341 compatible = "st,stm32mp1-dfsdm";
1344 clock-names = "dfsdm";
1345 #address-cells = <1>;
1346 #size-cells = <0>;
1347 access-controllers = <&etzpc 61>;
1351 compatible = "st,stm32-dfsdm-adc";
1352 #io-channel-cells = <1>;
1356 dma-names = "rx";
1361 compatible = "st,stm32-dfsdm-adc";
1362 #io-channel-cells = <1>;
1366 dma-names = "rx";
1371 compatible = "st,stm32-dfsdm-adc";
1372 #io-channel-cells = <1>;
1376 dma-names = "rx";
1381 compatible = "st,stm32-dfsdm-adc";
1382 #io-channel-cells = <1>;
1386 dma-names = "rx";
1391 compatible = "st,stm32-dfsdm-adc";
1392 #io-channel-cells = <1>;
1396 dma-names = "rx";
1401 compatible = "st,stm32-dfsdm-adc";
1402 #io-channel-cells = <1>;
1406 dma-names = "rx";
1411 dma1: dma-controller@48000000 {
1412 compatible = "st,stm32-dma";
1424 #dma-cells = <4>;
1426 dma-requests = <8>;
1427 access-controllers = <&etzpc 88>;
1430 dma2: dma-controller@48001000 {
1431 compatible = "st,stm32-dma";
1443 #dma-cells = <4>;
1445 dma-requests = <8>;
1446 access-controllers = <&etzpc 89>;
1449 dmamux1: dma-router@48002000 {
1450 compatible = "st,stm32h7-dmamux";
1452 #dma-cells = <3>;
1453 dma-requests = <128>;
1454 dma-masters = <&dma1 &dma2>;
1455 dma-channels = <16>;
1458 access-controllers = <&etzpc 90>;
1462 compatible = "st,stm32mp1-adc-core";
1467 clock-names = "bus", "adc";
1468 interrupt-controller;
1470 #interrupt-cells = <1>;
1471 #address-cells = <1>;
1472 #size-cells = <0>;
1473 access-controllers = <&etzpc 72>;
1477 compatible = "st,stm32mp1-adc";
1478 #io-channel-cells = <1>;
1479 #address-cells = <1>;
1480 #size-cells = <0>;
1482 interrupt-parent = <&adc>;
1485 dma-names = "rx";
1490 compatible = "st,stm32mp1-adc";
1491 #io-channel-cells = <1>;
1492 #address-cells = <1>;
1493 #size-cells = <0>;
1495 interrupt-parent = <&adc>;
1498 dma-names = "rx";
1499 nvmem-cells = <&vrefint>;
1500 nvmem-cell-names = "vrefint";
1514 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1515 arm,primecell-periphid = <0x00253180>;
1519 clock-names = "apb_pclk";
1521 cap-sd-highspeed;
1522 cap-mmc-highspeed;
1523 max-frequency = <120000000>;
1524 access-controllers = <&etzpc 86>;
1528 usbotg_hs: usb-otg@49000000 {
1529 compatible = "st,stm32mp15-hsotg", "snps,dwc2";
1532 clock-names = "otg", "utmi";
1534 reset-names = "dwc2";
1536 g-rx-fifo-size = <512>;
1537 g-np-tx-fifo-size = <32>;
1538 g-tx-fifo-size = <256 16 16 16 16 16 16 16>;
1540 otg-rev = <0x200>;
1541 usb33d-supply = <&usb33>;
1542 access-controllers = <&etzpc 85>;
1547 compatible = "st,stm32-dcmi";
1552 clock-names = "mclk";
1554 dma-names = "tx";
1555 access-controllers = <&etzpc 70>;
1560 #address-cells = <1>;
1561 #size-cells = <0>;
1562 compatible = "st,stm32-lptimer";
1564 interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
1566 clock-names = "mux";
1567 wakeup-source;
1568 access-controllers = <&etzpc 64>;
1572 compatible = "st,stm32-pwm-lp";
1573 #pwm-cells = <3>;
1578 compatible = "st,stm32-lptimer-trigger";
1584 compatible = "st,stm32-lptimer-counter";
1590 #address-cells = <1>;
1591 #size-cells = <0>;
1592 compatible = "st,stm32-lptimer";
1594 interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
1596 clock-names = "mux";
1597 wakeup-source;
1598 access-controllers = <&etzpc 65>;
1602 compatible = "st,stm32-pwm-lp";
1603 #pwm-cells = <3>;
1608 compatible = "st,stm32-lptimer-trigger";
1615 compatible = "st,stm32-lptimer";
1617 interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
1619 clock-names = "mux";
1620 wakeup-source;
1621 access-controllers = <&etzpc 66>;
1625 compatible = "st,stm32-pwm-lp";
1626 #pwm-cells = <3>;
1632 compatible = "st,stm32-lptimer";
1634 interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
1636 clock-names = "mux";
1637 wakeup-source;
1638 access-controllers = <&etzpc 67>;
1642 compatible = "st,stm32-pwm-lp";
1643 #pwm-cells = <3>;
1649 compatible = "st,stm32-vrefbuf";
1651 regulator-min-microvolt = <1500000>;
1652 regulator-max-microvolt = <2500000>;
1654 access-controllers = <&etzpc 69>;
1659 compatible = "st,stm32h7-sai";
1660 #address-cells = <1>;
1661 #size-cells = <1>;
1666 access-controllers = <&etzpc 68>;
1669 sai4a: audio-controller@50027004 {
1670 #sound-dai-cells = <0>;
1671 compatible = "st,stm32-sai-sub-a";
1674 clock-names = "sai_ck";
1679 sai4b: audio-controller@50027024 {
1680 #sound-dai-cells = <0>;
1681 compatible = "st,stm32-sai-sub-b";
1684 clock-names = "sai_ck";
1691 compatible = "st,stm32f756-hash";
1697 dma-names = "in";
1698 dma-maxburst = <2>;
1699 access-controllers = <&etzpc 8>;
1704 compatible = "st,stm32-rng";
1708 access-controllers = <&etzpc 7>;
1712 fmc: memory-controller@58002000 {
1713 #address-cells = <2>;
1714 #size-cells = <1>;
1715 compatible = "st,stm32mp1-fmc2-ebi";
1719 access-controllers = <&etzpc 91>;
1728 nand-controller@4,0 {
1729 #address-cells = <1>;
1730 #size-cells = <0>;
1731 compatible = "st,stm32mp1-fmc2-nfc";
1742 dma-names = "tx", "rx", "ecc";
1748 compatible = "st,stm32f469-qspi";
1750 reg-names = "qspi", "qspi_mm";
1754 dma-names = "tx", "rx";
1757 #address-cells = <1>;
1758 #size-cells = <0>;
1759 access-controllers = <&etzpc 92>;
1764 compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
1766 reg-names = "stmmaceth";
1767 interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1768 interrupt-names = "macirq";
1769 clock-names = "stmmaceth",
1770 "mac-clk-tx",
1771 "mac-clk-rx",
1772 "eth-ck",
1782 snps,mixed-burst;
1784 snps,en-tx-lpi-clockgating;
1785 snps,axi-config = <&stmmac_axi_config_0>;
1787 access-controllers = <&etzpc 94>;
1790 stmmac_axi_config_0: stmmac-axi-config {
1798 compatible = "st,stm32h7-uart";
1800 interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
1802 wakeup-source;
1803 access-controllers = <&etzpc 3>;
1808 #address-cells = <1>;
1809 #size-cells = <0>;
1810 compatible = "st,stm32h7-spi";
1817 access-controllers = <&etzpc 4>;
1818 dma-names = "rx", "tx";
1823 compatible = "st,stm32mp15-i2c";
1825 interrupt-names = "event", "error";
1830 #address-cells = <1>;
1831 #size-cells = <0>;
1832 st,syscfg-fmp = <&syscfg 0x4 0x8>;
1833 wakeup-source;
1834 i2c-analog-filter;
1835 access-controllers = <&etzpc 5>;
1840 compatible = "st,stm32mp15-i2c";
1842 interrupt-names = "event", "error";
1847 #address-cells = <1>;
1848 #size-cells = <0>;
1849 st,syscfg-fmp = <&syscfg 0x4 0x20>;
1850 wakeup-source;
1851 i2c-analog-filter;
1852 access-controllers = <&etzpc 12>;
1858 compatible = "st,stm32-tamp", "syscon", "simple-mfd";
1864 * pinctrl and exti.
1867 #address-cells = <1>;
1868 #size-cells = <1>;
1869 compatible = "st,stm32mp157-pinctrl";
1871 interrupt-parent = <&exti>;
1872 st,syscfg = <&exti 0x60 0xff>;
1875 gpio-controller;
1876 #gpio-cells = <2>;
1877 interrupt-controller;
1878 #interrupt-cells = <2>;
1881 st,bank-name = "GPIOA";
1886 gpio-controller;
1887 #gpio-cells = <2>;
1888 interrupt-controller;
1889 #interrupt-cells = <2>;
1892 st,bank-name = "GPIOB";
1897 gpio-controller;
1898 #gpio-cells = <2>;
1899 interrupt-controller;
1900 #interrupt-cells = <2>;
1903 st,bank-name = "GPIOC";
1908 gpio-controller;
1909 #gpio-cells = <2>;
1910 interrupt-controller;
1911 #interrupt-cells = <2>;
1914 st,bank-name = "GPIOD";
1919 gpio-controller;
1920 #gpio-cells = <2>;
1921 interrupt-controller;
1922 #interrupt-cells = <2>;
1925 st,bank-name = "GPIOE";
1930 gpio-controller;
1931 #gpio-cells = <2>;
1932 interrupt-controller;
1933 #interrupt-cells = <2>;
1936 st,bank-name = "GPIOF";
1941 gpio-controller;
1942 #gpio-cells = <2>;
1943 interrupt-controller;
1944 #interrupt-cells = <2>;
1947 st,bank-name = "GPIOG";
1952 gpio-controller;
1953 #gpio-cells = <2>;
1954 interrupt-controller;
1955 #interrupt-cells = <2>;
1958 st,bank-name = "GPIOH";
1963 gpio-controller;
1964 #gpio-cells = <2>;
1965 interrupt-controller;
1966 #interrupt-cells = <2>;
1969 st,bank-name = "GPIOI";
1974 gpio-controller;
1975 #gpio-cells = <2>;
1976 interrupt-controller;
1977 #interrupt-cells = <2>;
1980 st,bank-name = "GPIOJ";
1985 gpio-controller;
1986 #gpio-cells = <2>;
1987 interrupt-controller;
1988 #interrupt-cells = <2>;
1991 st,bank-name = "GPIOK";
1997 #address-cells = <1>;
1998 #size-cells = <1>;
1999 compatible = "st,stm32mp157-z-pinctrl";
2001 interrupt-parent = <&exti>;
2002 st,syscfg = <&exti 0x60 0xff>;
2005 gpio-controller;
2006 #gpio-cells = <2>;
2007 interrupt-controller;
2008 #interrupt-cells = <2>;
2011 st,bank-name = "GPIOZ";
2012 st,bank-ioport = <11>;
2019 compatible = "st,mlahb", "simple-bus";
2020 #address-cells = <1>;
2021 #size-cells = <1>;
2023 dma-ranges = <0x00000000 0x38000000 0x10000>,
2028 compatible = "st,stm32mp1-m4";
2033 reset-names = "mcu_rst";
2034 st,syscfg-holdboot = <&rcc 0x10C 0x1>;
2035 st,syscfg-pdds = <&pwr_mcu 0x0 0x1>;
2036 st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>;
2037 st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>;