Lines Matching +full:0 +full:- +full:9 +full:a +full:- +full:f
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 /omit-if-no-ref/
10 adc1_pins_a: adc1-pins-0 {
12 pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */
16 /omit-if-no-ref/
17 adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 {
19 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
20 <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */
24 /omit-if-no-ref/
25 adc1_usb_cc_pins_b: adc1-usb-cc-pins-1 {
27 pinmux = <STM32_PINMUX('A', 5, ANALOG)>, /* ADC1_INP2 */
28 <STM32_PINMUX('F', 13, ANALOG)>; /* ADC1_INP11 */
32 /omit-if-no-ref/
33 dcmipp_pins_a: dcmi-0 {
36 <STM32_PINMUX('G', 9, AF13)>,/* DCMI_VSYNC */
38 <STM32_PINMUX('A', 9, AF13)>,/* DCMI_D0 */
39 <STM32_PINMUX('D', 0, AF13)>,/* DCMI_D1 */
46 bias-disable;
50 /omit-if-no-ref/
51 dcmipp_sleep_pins_a: dcmi-sleep-0 {
54 <STM32_PINMUX('G', 9, ANALOG)>,/* DCMI_VSYNC */
56 <STM32_PINMUX('A', 9, ANALOG)>,/* DCMI_D0 */
57 <STM32_PINMUX('D', 0, ANALOG)>,/* DCMI_D1 */
67 /omit-if-no-ref/
68 eth1_rgmii_pins_a: eth1-rgmii-0 {
76 <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
78 bias-disable;
79 drive-push-pull;
80 slew-rate = <2>;
86 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
88 <STM32_PINMUX('A', 7, AF11)>, /* ETH_RGMII_RX_CTL */
90 bias-disable;
94 /omit-if-no-ref/
95 eth1_rgmii_sleep_pins_a: eth1-rgmii-sleep-0 {
97 pinmux = <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
99 bias-disable;
100 drive-push-pull;
101 slew-rate = <2>;
113 <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD1 */
115 <STM32_PINMUX('A', 7, ANALOG)>, /* ETH_RGMII_RX_CTL */
120 /omit-if-no-ref/
121 eth1_rmii_pins_a: eth1-rmii-0 {
126 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RMII_REF_CLK */
127 <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
129 bias-disable;
130 drive-push-pull;
131 slew-rate = <1>;
138 bias-disable;
142 /omit-if-no-ref/
143 eth1_rmii_sleep_pins_a: eth1-rmii-sleep-0 {
148 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RMII_REF_CLK */
149 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
157 /omit-if-no-ref/
158 eth2_rgmii_pins_a: eth2-rgmii-0 {
160 pinmux = <STM32_PINMUX('F', 7, AF11)>, /* ETH_RGMII_TXD0 */
164 <STM32_PINMUX('F', 6, AF11)>, /* ETH_RGMII_TX_CTL */
168 bias-disable;
169 drive-push-pull;
170 slew-rate = <2>;
174 pinmux = <STM32_PINMUX('F', 4, AF11)>, /* ETH_RGMII_RXD0 */
177 <STM32_PINMUX('A', 8, AF11)>, /* ETH_RGMII_RXD3 */
178 <STM32_PINMUX('A', 12, AF11)>, /* ETH_RGMII_RX_CTL */
180 bias-disable;
184 /omit-if-no-ref/
185 eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 {
189 bias-disable;
190 drive-push-pull;
191 slew-rate = <2>;
195 pinmux = <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RGMII_TXD0 */
199 <STM32_PINMUX('F', 6, ANALOG)>, /* ETH_RGMII_TX_CTL */
201 <STM32_PINMUX('F', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
204 <STM32_PINMUX('A', 8, ANALOG)>, /* ETH_RGMII_RXD3 */
205 <STM32_PINMUX('A', 12, ANALOG)>, /* ETH_RGMII_RX_CTL */
210 /omit-if-no-ref/
211 eth2_rmii_pins_a: eth2-rmii-0 {
213 pinmux = <STM32_PINMUX('F', 7, AF11)>, /* ETH_RMII_TXD0 */
216 <STM32_PINMUX('F', 6, AF11)>, /* ETH_RMII_TX_EN */
219 bias-disable;
220 drive-push-pull;
221 slew-rate = <1>;
225 pinmux = <STM32_PINMUX('F', 4, AF11)>, /* ETH_RMII_RXD0 */
227 <STM32_PINMUX('A', 12, AF11)>; /* ETH_RMII_CRS_DV */
228 bias-disable;
232 /omit-if-no-ref/
233 eth2_rmii_sleep_pins_a: eth2-rmii-sleep-0 {
235 pinmux = <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RMII_TXD0 */
238 <STM32_PINMUX('F', 6, ANALOG)>, /* ETH_RMII_TX_EN */
241 <STM32_PINMUX('F', 4, ANALOG)>, /* ETH_RMII_RXD0 */
243 <STM32_PINMUX('A', 12, ANALOG)>; /* ETH_RMII_CRS_DV */
247 /omit-if-no-ref/
248 goodix_pins_a: goodix-0 {
251 * via the pinctrl not the driver (a pull-down resistor
257 output-high;
258 bias-pull-up;
261 * Interrupt line must have a pull-down resistor
262 * in order to freeze the i2c address at 0x5D
265 pinmux = <STM32_PINMUX('F', 5, GPIO)>;
266 bias-pull-down;
270 /omit-if-no-ref/
271 i2c1_pins_a: i2c1-0 {
275 bias-disable;
276 drive-open-drain;
277 slew-rate = <0>;
281 /omit-if-no-ref/
282 i2c1_sleep_pins_a: i2c1-sleep-0 {
289 /omit-if-no-ref/
290 i2c5_pins_a: i2c5-0 {
294 bias-disable;
295 drive-open-drain;
296 slew-rate = <0>;
300 /omit-if-no-ref/
301 i2c5_sleep_pins_a: i2c5-sleep-0 {
308 /omit-if-no-ref/
309 i2c5_pins_b: i2c5-1 {
313 bias-disable;
314 drive-open-drain;
315 slew-rate = <0>;
319 /omit-if-no-ref/
320 i2c5_sleep_pins_b: i2c5-sleep-1 {
327 /omit-if-no-ref/
328 ltdc_pins_a: ltdc-0 {
330 pinmux = <STM32_PINMUX('D', 9, AF13)>, /* LCD_CLK */
333 <STM32_PINMUX('H', 9, AF11)>, /* LCD_DE */
339 <STM32_PINMUX('E', 9, AF14)>, /* LCD_R7 */
341 <STM32_PINMUX('F', 3, AF14)>, /* LCD_G3 */
343 <STM32_PINMUX('G', 0, AF14)>, /* LCD_G5 */
345 <STM32_PINMUX('A', 15, AF11)>, /* LCD_G7 */
347 <STM32_PINMUX('F', 2, AF14)>, /* LCD_B3 */
349 <STM32_PINMUX('E', 0, AF14)>, /* LCD_B5 */
351 <STM32_PINMUX('F', 1, AF13)>; /* LCD_B7 */
352 bias-disable;
353 drive-push-pull;
354 slew-rate = <0>;
358 /omit-if-no-ref/
359 ltdc_sleep_pins_a: ltdc-sleep-0 {
361 pinmux = <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_CLK */
364 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_DE */
370 <STM32_PINMUX('E', 9, ANALOG)>, /* LCD_R7 */
372 <STM32_PINMUX('F', 3, ANALOG)>, /* LCD_G3 */
374 <STM32_PINMUX('G', 0, ANALOG)>, /* LCD_G5 */
376 <STM32_PINMUX('A', 15, ANALOG)>, /* LCD_G7 */
378 <STM32_PINMUX('F', 2, ANALOG)>, /* LCD_B3 */
380 <STM32_PINMUX('E', 0, ANALOG)>, /* LCD_B5 */
382 <STM32_PINMUX('F', 1, ANALOG)>; /* LCD_B7 */
386 /omit-if-no-ref/
387 m_can1_pins_a: m-can1-0 {
390 slew-rate = <1>;
391 drive-push-pull;
392 bias-disable;
395 pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */
396 bias-disable;
400 /omit-if-no-ref/
401 m_can1_sleep_pins_a: m_can1-sleep-0 {
404 <STM32_PINMUX('D', 0, ANALOG)>; /* CAN1_RX */
408 /omit-if-no-ref/
409 m_can2_pins_a: m-can2-0 {
411 pinmux = <STM32_PINMUX('G', 0, AF9)>; /* CAN2_TX */
412 slew-rate = <1>;
413 drive-push-pull;
414 bias-disable;
417 pinmux = <STM32_PINMUX('E', 0, AF9)>; /* CAN2_RX */
418 bias-disable;
422 /omit-if-no-ref/
423 m_can2_sleep_pins_a: m_can2-sleep-0 {
425 pinmux = <STM32_PINMUX('G', 0, ANALOG)>, /* CAN2_TX */
426 <STM32_PINMUX('E', 0, ANALOG)>; /* CAN2_RX */
430 /omit-if-no-ref/
431 mcp23017_pins_a: mcp23017-0 {
434 bias-pull-up;
438 /omit-if-no-ref/
439 pwm3_pins_a: pwm3-0 {
442 bias-pull-down;
443 drive-push-pull;
444 slew-rate = <0>;
448 /omit-if-no-ref/
449 pwm3_sleep_pins_a: pwm3-sleep-0 {
455 /omit-if-no-ref/
456 pwm4_pins_a: pwm4-0 {
459 bias-pull-down;
460 drive-push-pull;
461 slew-rate = <0>;
465 /omit-if-no-ref/
466 pwm4_sleep_pins_a: pwm4-sleep-0 {
472 /omit-if-no-ref/
473 pwm5_pins_a: pwm5-0 {
476 bias-pull-down;
477 drive-push-pull;
478 slew-rate = <0>;
482 /omit-if-no-ref/
483 pwm5_sleep_pins_a: pwm5-sleep-0 {
489 /omit-if-no-ref/
490 pwm8_pins_a: pwm8-0 {
493 bias-pull-down;
494 drive-push-pull;
495 slew-rate = <0>;
499 /omit-if-no-ref/
500 pwm8_sleep_pins_a: pwm8-sleep-0 {
506 /omit-if-no-ref/
507 pwm13_pins_a: pwm13-0 {
509 pinmux = <STM32_PINMUX('A', 6, AF9)>; /* TIM13_CH1 */
510 bias-pull-down;
511 drive-push-pull;
512 slew-rate = <0>;
516 /omit-if-no-ref/
517 pwm13_sleep_pins_a: pwm13-sleep-0 {
519 pinmux = <STM32_PINMUX('A', 6, ANALOG)>; /* TIM13_CH1 */
523 /omit-if-no-ref/
524 pwm14_pins_a: pwm14-0 {
526 pinmux = <STM32_PINMUX('F', 9, AF9)>; /* TIM14_CH1 */
527 bias-pull-down;
528 drive-push-pull;
529 slew-rate = <0>;
533 /omit-if-no-ref/
534 pwm14_sleep_pins_a: pwm14-sleep-0 {
536 pinmux = <STM32_PINMUX('F', 9, ANALOG)>; /* TIM14_CH1 */
540 /omit-if-no-ref/
541 qspi_clk_pins_a: qspi-clk-0 {
543 pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
544 bias-disable;
545 drive-push-pull;
546 slew-rate = <3>;
550 /omit-if-no-ref/
551 qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
553 pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
557 /omit-if-no-ref/
558 qspi_bk1_pins_a: qspi-bk1-0 {
560 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
561 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
564 bias-disable;
565 drive-push-pull;
566 slew-rate = <1>;
570 /omit-if-no-ref/
571 qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
573 pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
574 <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
580 /omit-if-no-ref/
581 qspi_cs1_pins_a: qspi-cs1-0 {
584 bias-pull-up;
585 drive-push-pull;
586 slew-rate = <1>;
590 /omit-if-no-ref/
591 qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 {
597 /omit-if-no-ref/
598 rtc_rsvd_pins_a: rtc-rsvd-0 {
604 /omit-if-no-ref/
605 sai1a_pins_a: sai1a-0 {
607 pinmux = <STM32_PINMUX('A', 4, AF12)>, /* SAI1_SCK_A */
610 slew-rate = <0>;
611 drive-push-pull;
612 bias-disable;
616 /omit-if-no-ref/
617 sai1a_sleep_pins_a: sai1a-sleep-0 {
619 pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* SAI1_SCK_A */
625 /omit-if-no-ref/
626 sai1b_pins_a: sai1b-0 {
628 pinmux = <STM32_PINMUX('A', 0, AF6)>; /* SAI1_SD_B */
629 bias-disable;
633 /omit-if-no-ref/
634 sai1b_sleep_pins_a: sai1b-sleep-0 {
636 pinmux = <STM32_PINMUX('A', 0, ANALOG)>; /* SAI1_SD_B */
640 /omit-if-no-ref/
641 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
644 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
648 slew-rate = <1>;
649 drive-push-pull;
650 bias-disable;
654 /omit-if-no-ref/
655 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
658 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
661 slew-rate = <1>;
662 drive-push-pull;
663 bias-disable;
667 slew-rate = <1>;
668 drive-open-drain;
669 bias-disable;
673 /omit-if-no-ref/
674 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
677 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
685 /omit-if-no-ref/
686 sdmmc1_clk_pins_a: sdmmc1-clk-0 {
689 slew-rate = <1>;
690 drive-push-pull;
691 bias-disable;
695 /omit-if-no-ref/
696 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
703 slew-rate = <1>;
704 drive-push-pull;
705 bias-pull-up;
709 /omit-if-no-ref/
710 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
716 slew-rate = <1>;
717 drive-push-pull;
718 bias-pull-up;
722 slew-rate = <1>;
723 drive-open-drain;
724 bias-pull-up;
728 /omit-if-no-ref/
729 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
740 /omit-if-no-ref/
741 sdmmc2_clk_pins_a: sdmmc2-clk-0 {
744 slew-rate = <1>;
745 drive-push-pull;
746 bias-pull-up;
750 /omit-if-no-ref/
751 sdmmc2_d47_pins_a: sdmmc2-d47-0 {
753 pinmux = <STM32_PINMUX('F', 0, AF10)>, /* SDMMC2_D4 */
754 <STM32_PINMUX('B', 9, AF10)>, /* SDMMC2_D5 */
757 slew-rate = <1>;
758 drive-push-pull;
759 bias-pull-up;
763 /omit-if-no-ref/
764 sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
766 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC2_D4 */
767 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC2_D5 */
773 /omit-if-no-ref/
774 spi2_pins_a: spi2-0 {
778 bias-disable;
779 drive-push-pull;
780 slew-rate = <1>;
785 bias-disable;
789 /omit-if-no-ref/
790 spi2_sleep_pins_a: spi2-sleep-0 {
798 /omit-if-no-ref/
799 spi3_pins_a: spi3-0 {
802 <STM32_PINMUX('F', 1, AF5)>; /* SPI3_MOSI */
803 bias-disable;
804 drive-push-pull;
805 slew-rate = <1>;
810 bias-disable;
814 /omit-if-no-ref/
815 spi3_sleep_pins_a: spi3-sleep-0 {
819 <STM32_PINMUX('F', 1, ANALOG)>; /* SPI3_MOSI */
823 /omit-if-no-ref/
824 spi5_pins_a: spi5-0 {
828 bias-disable;
829 drive-push-pull;
830 slew-rate = <1>;
834 pinmux = <STM32_PINMUX('A', 8, AF5)>; /* SPI5_MISO */
835 bias-disable;
839 /omit-if-no-ref/
840 spi5_sleep_pins_a: spi5-sleep-0 {
843 <STM32_PINMUX('A', 8, ANALOG)>, /* SPI5_MISO */
848 /omit-if-no-ref/
849 stm32g0_intn_pins_a: stm32g0-intn-0 {
852 bias-pull-up;
856 /omit-if-no-ref/
857 uart4_pins_a: uart4-0 {
860 bias-disable;
861 drive-push-pull;
862 slew-rate = <0>;
866 bias-disable;
870 /omit-if-no-ref/
871 uart4_idle_pins_a: uart4-idle-0 {
877 bias-disable;
881 /omit-if-no-ref/
882 uart4_sleep_pins_a: uart4-sleep-0 {
889 /omit-if-no-ref/
890 uart4_pins_b: uart4-1 {
892 pinmux = <STM32_PINMUX('A', 9, AF8)>; /* UART4_TX */
893 bias-disable;
894 drive-push-pull;
895 slew-rate = <0>;
899 bias-pull-up;
903 /omit-if-no-ref/
904 uart4_idle_pins_b: uart4-idle-1 {
906 pinmux = <STM32_PINMUX('A', 9, ANALOG)>; /* UART4_TX */
910 bias-pull-up;
914 /omit-if-no-ref/
915 uart4_sleep_pins_b: uart4-sleep-1 {
917 pinmux = <STM32_PINMUX('A', 9, ANALOG)>, /* UART4_TX */
922 /omit-if-no-ref/
923 uart7_pins_a: uart7-0 {
927 bias-disable;
928 drive-push-pull;
929 slew-rate = <0>;
934 bias-disable;
938 /omit-if-no-ref/
939 uart7_idle_pins_a: uart7-idle-0 {
946 bias-disable;
947 drive-push-pull;
948 slew-rate = <0>;
952 bias-disable;
956 /omit-if-no-ref/
957 uart7_sleep_pins_a: uart7-sleep-0 {
966 /omit-if-no-ref/
967 uart8_pins_a: uart8-0 {
970 bias-disable;
971 drive-push-pull;
972 slew-rate = <0>;
975 pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */
976 bias-pull-up;
980 /omit-if-no-ref/
981 uart8_idle_pins_a: uart8-idle-0 {
986 pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */
987 bias-pull-up;
991 /omit-if-no-ref/
992 uart8_sleep_pins_a: uart8-sleep-0 {
995 <STM32_PINMUX('F', 9, ANALOG)>; /* UART8_RX */
999 /omit-if-no-ref/
1000 usart1_pins_a: usart1-0 {
1002 pinmux = <STM32_PINMUX('C', 0, AF7)>, /* USART1_TX */
1004 bias-disable;
1005 drive-push-pull;
1006 slew-rate = <0>;
1009 pinmux = <STM32_PINMUX('B', 0, AF4)>, /* USART1_RX */
1010 <STM32_PINMUX('A', 7, AF7)>; /* USART1_CTS_NSS */
1011 bias-pull-up;
1015 /omit-if-no-ref/
1016 usart1_idle_pins_a: usart1-idle-0 {
1018 pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */
1019 <STM32_PINMUX('A', 7, ANALOG)>; /* USART1_CTS_NSS */
1023 bias-disable;
1024 drive-push-pull;
1025 slew-rate = <0>;
1028 pinmux = <STM32_PINMUX('B', 0, AF4)>; /* USART1_RX */
1029 bias-pull-up;
1033 /omit-if-no-ref/
1034 usart1_sleep_pins_a: usart1-sleep-0 {
1036 pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */
1038 <STM32_PINMUX('A', 7, ANALOG)>, /* USART1_CTS_NSS */
1039 <STM32_PINMUX('B', 0, ANALOG)>; /* USART1_RX */
1043 /omit-if-no-ref/
1044 usart1_pins_b: usart1-1 {
1046 pinmux = <STM32_PINMUX('C', 0, AF7)>; /* USART1_TX */
1047 bias-disable;
1048 drive-push-pull;
1049 slew-rate = <0>;
1053 bias-pull-up;
1057 /omit-if-no-ref/
1058 usart1_idle_pins_b: usart1-idle-1 {
1060 pinmux = <STM32_PINMUX('C', 0, ANALOG)>; /* USART1_TX */
1064 bias-pull-up;
1068 /omit-if-no-ref/
1069 usart1_sleep_pins_b: usart1-sleep-1 {
1071 pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */
1076 /omit-if-no-ref/
1077 usart2_pins_a: usart2-0 {
1081 bias-disable;
1082 drive-push-pull;
1083 slew-rate = <0>;
1088 bias-disable;
1092 /omit-if-no-ref/
1093 usart2_idle_pins_a: usart2-idle-0 {
1100 bias-disable;
1101 drive-push-pull;
1102 slew-rate = <0>;
1106 bias-disable;
1110 /omit-if-no-ref/
1111 usart2_sleep_pins_a: usart2-sleep-0 {
1120 /omit-if-no-ref/
1121 usart2_pins_b: usart2-1 {
1123 pinmux = <STM32_PINMUX('F', 11, AF1)>, /* USART2_TX */
1124 <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
1125 bias-disable;
1126 drive-push-pull;
1127 slew-rate = <0>;
1132 bias-disable;
1136 /omit-if-no-ref/
1137 usart2_idle_pins_b: usart2-idle-1 {
1139 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* USART2_TX */
1143 pinmux = <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
1144 bias-disable;
1145 drive-push-pull;
1146 slew-rate = <0>;
1150 bias-disable;
1154 /omit-if-no-ref/
1155 usart2_sleep_pins_b: usart2-sleep-1 {
1157 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* USART2_TX */
1158 <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */