Lines Matching +full:intc +full:- +full:irqpin
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the SH-Mobile AG5 (R8A73A00/SH73A0) SoC
8 #include <dt-bindings/clock/sh73a0-clock.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <1>;
16 #size-cells = <1>;
19 #address-cells = <1>;
20 #size-cells = <0>;
24 compatible = "arm,cortex-a9";
26 clock-frequency = <1196000000>;
28 power-domains = <&pd_a2sl>;
29 next-level-cache = <&L2>;
33 compatible = "arm,cortex-a9";
35 clock-frequency = <1196000000>;
37 power-domains = <&pd_a2sl>;
38 next-level-cache = <&L2>;
43 compatible = "arm,cortex-a9-global-timer";
50 compatible = "arm,cortex-a9-twd-timer";
56 gic: interrupt-controller@f0001000 {
57 compatible = "arm,cortex-a9-gic";
58 #interrupt-cells = <3>;
59 interrupt-controller;
64 L2: cache-controller@f0100000 {
65 compatible = "arm,pl310-cache";
68 power-domains = <&pd_a3sm>;
69 arm,data-latency = <3 3 3>;
70 arm,tag-latency = <2 2 2>;
71 arm,shared-override;
72 cache-unified;
73 cache-level = <2>;
76 sbsc2: memory-controller@fb400000 {
77 compatible = "renesas,sbsc-sh73a0";
81 interrupt-names = "sec", "temp";
82 power-domains = <&pd_a4bc1>;
85 sbsc1: memory-controller@fe400000 {
86 compatible = "renesas,sbsc-sh73a0";
90 interrupt-names = "sec", "temp";
91 power-domains = <&pd_a4bc0>;
95 compatible = "arm,cortex-a9-pmu";
98 interrupt-affinity = <&cpu0>, <&cpu1>;
102 compatible = "renesas,sh73a0-cmt1";
106 clock-names = "fck";
107 power-domains = <&pd_c5>;
111 irqpin0: interrupt-controller@e6900000 {
112 compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
113 #interrupt-cells = <2>;
114 interrupt-controller;
129 power-domains = <&pd_a4s>;
130 control-parent;
133 irqpin1: interrupt-controller@e6900004 {
134 compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
135 #interrupt-cells = <2>;
136 interrupt-controller;
151 power-domains = <&pd_a4s>;
152 control-parent;
155 irqpin2: interrupt-controller@e6900008 {
156 compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
157 #interrupt-cells = <2>;
158 interrupt-controller;
173 power-domains = <&pd_a4s>;
174 control-parent;
177 irqpin3: interrupt-controller@e690000c {
178 compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
179 #interrupt-cells = <2>;
180 interrupt-controller;
195 power-domains = <&pd_a4s>;
196 control-parent;
200 #address-cells = <1>;
201 #size-cells = <0>;
202 compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic";
209 power-domains = <&pd_a3sp>;
214 #address-cells = <1>;
215 #size-cells = <0>;
216 compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic";
223 power-domains = <&pd_a3sp>;
228 #address-cells = <1>;
229 #size-cells = <0>;
230 compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic";
237 power-domains = <&pd_a3sp>;
242 #address-cells = <1>;
243 #size-cells = <0>;
244 compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic";
251 power-domains = <&pd_a3sp>;
256 #address-cells = <1>;
257 #size-cells = <0>;
258 compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic";
265 power-domains = <&pd_c5>;
270 compatible = "renesas,mmcif-sh73a0", "renesas,sh-mmcif";
275 power-domains = <&pd_a3sp>;
280 compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof";
284 power-domains = <&pd_a3sp>;
285 #address-cells = <1>;
286 #size-cells = <0>;
291 compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof";
295 power-domains = <&pd_a3sp>;
296 #address-cells = <1>;
297 #size-cells = <0>;
302 compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof";
306 power-domains = <&pd_a3sp>;
307 #address-cells = <1>;
308 #size-cells = <0>;
313 compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof";
317 power-domains = <&pd_a3sp>;
318 #address-cells = <1>;
319 #size-cells = <0>;
324 compatible = "renesas,sdhi-sh73a0";
330 power-domains = <&pd_a3sp>;
331 cap-sd-highspeed;
337 compatible = "renesas,sdhi-sh73a0";
342 power-domains = <&pd_a3sp>;
343 disable-wp;
344 cap-sd-highspeed;
349 compatible = "renesas,sdhi-sh73a0";
354 power-domains = <&pd_a3sp>;
355 disable-wp;
356 cap-sd-highspeed;
361 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
365 clock-names = "fck";
366 power-domains = <&pd_a3sp>;
371 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
375 clock-names = "fck";
376 power-domains = <&pd_a3sp>;
381 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
385 clock-names = "fck";
386 power-domains = <&pd_a3sp>;
391 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
395 clock-names = "fck";
396 power-domains = <&pd_a3sp>;
401 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
405 clock-names = "fck";
406 power-domains = <&pd_a3sp>;
411 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
415 clock-names = "fck";
416 power-domains = <&pd_a3sp>;
421 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
425 clock-names = "fck";
426 power-domains = <&pd_a3sp>;
431 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
435 clock-names = "fck";
436 power-domains = <&pd_a3sp>;
441 compatible = "renesas,scifb-sh73a0", "renesas,scifb";
445 clock-names = "fck";
446 power-domains = <&pd_a3sp>;
451 compatible = "renesas,pfc-sh73a0";
454 gpio-controller;
455 #gpio-cells = <2>;
456 gpio-ranges =
459 interrupts-extended =
468 power-domains = <&pd_c5>;
471 sysc: system-controller@e6180000 {
472 compatible = "renesas,sysc-sh73a0", "renesas,sysc-rmobile";
475 pm-domains {
477 #address-cells = <1>;
478 #size-cells = <0>;
479 #power-domain-cells = <0>;
483 #power-domain-cells = <0>;
488 #power-domain-cells = <0>;
493 #power-domain-cells = <0>;
498 #power-domain-cells = <0>;
503 #power-domain-cells = <0>;
508 #power-domain-cells = <0>;
513 #address-cells = <1>;
514 #size-cells = <0>;
515 #power-domain-cells = <0>;
519 #power-domain-cells = <0>;
524 #power-domain-cells = <0>;
530 #address-cells = <1>;
531 #size-cells = <0>;
532 #power-domain-cells = <0>;
536 #address-cells = <1>;
537 #size-cells = <0>;
538 #power-domain-cells = <0>;
542 #address-cells = <1>;
543 #size-cells = <0>;
544 #power-domain-cells = <0>;
551 #address-cells = <1>;
552 #size-cells = <0>;
553 #power-domain-cells = <0>;
557 #power-domain-cells = <0>;
562 #power-domain-cells = <0>;
567 #address-cells = <1>;
568 #size-cells = <0>;
569 #power-domain-cells = <0>;
573 #power-domain-cells = <0>;
582 #sound-dai-cells = <1>;
583 compatible = "renesas,fsi2-sh73a0", "renesas,sh_fsi2";
587 power-domains = <&pd_a4mp>;
592 compatible = "renesas,bsc-sh73a0", "renesas,bsc",
593 "simple-pm-bus";
594 #address-cells = <1>;
595 #size-cells = <1>;
600 power-domains = <&pd_a4s>;
604 #address-cells = <1>;
605 #size-cells = <1>;
610 compatible = "fixed-clock";
611 #clock-cells = <0>;
612 clock-frequency = <32768>;
615 compatible = "fixed-clock";
616 #clock-cells = <0>;
617 clock-frequency = <26000000>;
620 compatible = "fixed-clock";
621 #clock-cells = <0>;
623 clock-frequency = <0>;
626 compatible = "fixed-clock";
627 #clock-cells = <0>;
629 clock-frequency = <0>;
632 compatible = "fixed-clock";
633 #clock-cells = <0>;
635 clock-frequency = <0>;
638 compatible = "fixed-clock";
639 #clock-cells = <0>;
641 clock-frequency = <0>;
646 compatible = "renesas,sh73a0-cpg-clocks";
649 #clock-cells = <1>;
650 clock-output-names = "main", "pll0", "pll1", "pll2",
658 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
664 #clock-cells = <0>;
667 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
673 #clock-cells = <0>;
676 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
682 #clock-cells = <0>;
685 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
689 #clock-cells = <0>;
690 clock-output-names = "zb";
693 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
697 #clock-cells = <0>;
700 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
704 #clock-cells = <0>;
707 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
711 #clock-cells = <0>;
714 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
718 #clock-cells = <0>;
721 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
725 #clock-cells = <0>;
728 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
732 #clock-cells = <0>;
735 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
739 #clock-cells = <0>;
742 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
746 #clock-cells = <0>;
749 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
753 #clock-cells = <0>;
756 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
760 #clock-cells = <0>;
763 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
767 #clock-cells = <0>;
770 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
774 #clock-cells = <0>;
777 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
781 #clock-cells = <0>;
784 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
788 #clock-cells = <0>;
791 compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
796 #clock-cells = <0>;
801 compatible = "fixed-factor-clock";
803 #clock-cells = <0>;
804 clock-div = <2>;
805 clock-mult = <1>;
808 compatible = "fixed-factor-clock";
810 #clock-cells = <0>;
811 clock-div = <2>;
812 clock-mult = <1>;
815 compatible = "fixed-factor-clock";
817 #clock-cells = <0>;
818 clock-div = <7>;
819 clock-mult = <1>;
822 compatible = "fixed-factor-clock";
824 #clock-cells = <0>;
825 clock-div = <13>;
826 clock-mult = <1>;
829 compatible = "fixed-factor-clock";
831 #clock-cells = <0>;
832 clock-div = <4>;
833 clock-mult = <1>;
838 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
841 #clock-cells = <1>;
842 clock-indices = <
845 clock-output-names =
849 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
859 #clock-cells = <1>;
860 clock-indices = <
867 clock-output-names =
872 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
879 #clock-cells = <1>;
880 clock-indices = <
889 clock-output-names =
896 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
907 #clock-cells = <1>;
908 clock-indices = <
918 clock-output-names =
924 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
928 #clock-cells = <1>;
929 clock-indices = <
933 clock-output-names =
937 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
940 #clock-cells = <1>;
941 clock-indices = <
944 clock-output-names =