Lines Matching +full:- +full:cpg
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V2H (R8A77920) SoC
8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a7792-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
42 clock-frequency = <0>;
46 #address-cells = <1>;
47 #size-cells = <0>;
51 compatible = "arm,cortex-a15";
53 clock-frequency = <1000000000>;
54 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
55 power-domains = <&sysc R8A7792_PD_CA15_CPU0>;
56 enable-method = "renesas,apmu";
57 next-level-cache = <&L2_CA15>;
62 compatible = "arm,cortex-a15";
64 clock-frequency = <1000000000>;
65 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
66 power-domains = <&sysc R8A7792_PD_CA15_CPU1>;
67 enable-method = "renesas,apmu";
68 next-level-cache = <&L2_CA15>;
71 L2_CA15: cache-controller-0 {
73 cache-unified;
74 cache-level = <2>;
75 power-domains = <&sysc R8A7792_PD_CA15_SCU>;
81 compatible = "fixed-clock";
82 #clock-cells = <0>;
84 clock-frequency = <0>;
88 compatible = "simple-bus";
89 #address-cells = <1>;
90 #size-cells = <1>;
95 compatible = "arm,cortex-a15-pmu";
96 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
98 interrupt-affinity = <&cpu0>, <&cpu1>;
103 compatible = "fixed-clock";
104 #clock-cells = <0>;
106 clock-frequency = <0>;
110 compatible = "simple-bus";
111 interrupt-parent = <&gic>;
113 #address-cells = <2>;
114 #size-cells = <2>;
118 compatible = "renesas,r8a7792-wdt",
119 "renesas,rcar-gen2-wdt";
122 clocks = <&cpg CPG_MOD 402>;
123 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
124 resets = <&cpg 402>;
129 compatible = "renesas,gpio-r8a7792",
130 "renesas,rcar-gen2-gpio";
133 #gpio-cells = <2>;
134 gpio-controller;
135 gpio-ranges = <&pfc 0 0 29>;
136 #interrupt-cells = <2>;
137 interrupt-controller;
138 clocks = <&cpg CPG_MOD 912>;
139 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
140 resets = <&cpg 912>;
144 compatible = "renesas,gpio-r8a7792",
145 "renesas,rcar-gen2-gpio";
148 #gpio-cells = <2>;
149 gpio-controller;
150 gpio-ranges = <&pfc 0 32 23>;
151 #interrupt-cells = <2>;
152 interrupt-controller;
153 clocks = <&cpg CPG_MOD 911>;
154 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
155 resets = <&cpg 911>;
159 compatible = "renesas,gpio-r8a7792",
160 "renesas,rcar-gen2-gpio";
163 #gpio-cells = <2>;
164 gpio-controller;
165 gpio-ranges = <&pfc 0 64 32>;
166 #interrupt-cells = <2>;
167 interrupt-controller;
168 clocks = <&cpg CPG_MOD 910>;
169 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
170 resets = <&cpg 910>;
174 compatible = "renesas,gpio-r8a7792",
175 "renesas,rcar-gen2-gpio";
178 #gpio-cells = <2>;
179 gpio-controller;
180 gpio-ranges = <&pfc 0 96 28>;
181 #interrupt-cells = <2>;
182 interrupt-controller;
183 clocks = <&cpg CPG_MOD 909>;
184 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
185 resets = <&cpg 909>;
189 compatible = "renesas,gpio-r8a7792",
190 "renesas,rcar-gen2-gpio";
193 #gpio-cells = <2>;
194 gpio-controller;
195 gpio-ranges = <&pfc 0 128 17>;
196 #interrupt-cells = <2>;
197 interrupt-controller;
198 clocks = <&cpg CPG_MOD 908>;
199 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
200 resets = <&cpg 908>;
204 compatible = "renesas,gpio-r8a7792",
205 "renesas,rcar-gen2-gpio";
208 #gpio-cells = <2>;
209 gpio-controller;
210 gpio-ranges = <&pfc 0 160 17>;
211 #interrupt-cells = <2>;
212 interrupt-controller;
213 clocks = <&cpg CPG_MOD 907>;
214 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
215 resets = <&cpg 907>;
219 compatible = "renesas,gpio-r8a7792",
220 "renesas,rcar-gen2-gpio";
223 #gpio-cells = <2>;
224 gpio-controller;
225 gpio-ranges = <&pfc 0 192 17>;
226 #interrupt-cells = <2>;
227 interrupt-controller;
228 clocks = <&cpg CPG_MOD 905>;
229 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
230 resets = <&cpg 905>;
234 compatible = "renesas,gpio-r8a7792",
235 "renesas,rcar-gen2-gpio";
238 #gpio-cells = <2>;
239 gpio-controller;
240 gpio-ranges = <&pfc 0 224 17>;
241 #interrupt-cells = <2>;
242 interrupt-controller;
243 clocks = <&cpg CPG_MOD 904>;
244 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
245 resets = <&cpg 904>;
249 compatible = "renesas,gpio-r8a7792",
250 "renesas,rcar-gen2-gpio";
253 #gpio-cells = <2>;
254 gpio-controller;
255 gpio-ranges = <&pfc 0 256 17>;
256 #interrupt-cells = <2>;
257 interrupt-controller;
258 clocks = <&cpg CPG_MOD 921>;
259 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
260 resets = <&cpg 921>;
264 compatible = "renesas,gpio-r8a7792",
265 "renesas,rcar-gen2-gpio";
268 #gpio-cells = <2>;
269 gpio-controller;
270 gpio-ranges = <&pfc 0 288 17>;
271 #interrupt-cells = <2>;
272 interrupt-controller;
273 clocks = <&cpg CPG_MOD 919>;
274 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
275 resets = <&cpg 919>;
279 compatible = "renesas,gpio-r8a7792",
280 "renesas,rcar-gen2-gpio";
283 #gpio-cells = <2>;
284 gpio-controller;
285 gpio-ranges = <&pfc 0 320 32>;
286 #interrupt-cells = <2>;
287 interrupt-controller;
288 clocks = <&cpg CPG_MOD 914>;
289 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
290 resets = <&cpg 914>;
294 compatible = "renesas,gpio-r8a7792",
295 "renesas,rcar-gen2-gpio";
298 #gpio-cells = <2>;
299 gpio-controller;
300 gpio-ranges = <&pfc 0 352 30>;
301 #interrupt-cells = <2>;
302 interrupt-controller;
303 clocks = <&cpg CPG_MOD 913>;
304 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
305 resets = <&cpg 913>;
309 compatible = "renesas,pfc-r8a7792";
313 cpg: clock-controller@e6150000 { label
314 compatible = "renesas,r8a7792-cpg-mssr";
317 clock-names = "extal";
318 #clock-cells = <2>;
319 #power-domain-cells = <0>;
320 #reset-cells = <1>;
324 compatible = "renesas,r8a7792-apmu", "renesas,apmu";
329 rst: reset-controller@e6160000 {
330 compatible = "renesas,r8a7792-rst";
334 sysc: system-controller@e6180000 {
335 compatible = "renesas,r8a7792-sysc";
337 #power-domain-cells = <1>;
340 irqc: interrupt-controller@e61c0000 {
341 compatible = "renesas,irqc-r8a7792", "renesas,irqc";
342 #interrupt-cells = <2>;
343 interrupt-controller;
349 clocks = <&cpg CPG_MOD 407>;
350 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
351 resets = <&cpg 407>;
355 compatible = "renesas,tmu-r8a7792", "renesas,tmu";
360 interrupt-names = "tuni0", "tuni1", "tuni2";
361 clocks = <&cpg CPG_MOD 125>;
362 clock-names = "fck";
363 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
364 resets = <&cpg 125>;
369 compatible = "renesas,tmu-r8a7792", "renesas,tmu";
375 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
376 clocks = <&cpg CPG_MOD 111>;
377 clock-names = "fck";
378 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
379 resets = <&cpg 111>;
384 compatible = "renesas,tmu-r8a7792", "renesas,tmu";
390 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
391 clocks = <&cpg CPG_MOD 122>;
392 clock-names = "fck";
393 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
394 resets = <&cpg 122>;
399 compatible = "renesas,tmu-r8a7792", "renesas,tmu";
405 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
406 clocks = <&cpg CPG_MOD 121>;
407 clock-names = "fck";
408 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
409 resets = <&cpg 121>;
414 compatible = "mmio-sram";
416 #address-cells = <1>;
417 #size-cells = <1>;
422 compatible = "mmio-sram";
424 #address-cells = <1>;
425 #size-cells = <1>;
428 smp-sram@0 {
429 compatible = "renesas,smp-sram";
436 compatible = "renesas,i2c-r8a7792",
437 "renesas,rcar-gen2-i2c";
440 clocks = <&cpg CPG_MOD 931>;
441 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
442 resets = <&cpg 931>;
443 i2c-scl-internal-delay-ns = <6>;
444 #address-cells = <1>;
445 #size-cells = <0>;
450 compatible = "renesas,i2c-r8a7792",
451 "renesas,rcar-gen2-i2c";
454 clocks = <&cpg CPG_MOD 930>;
455 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
456 resets = <&cpg 930>;
457 i2c-scl-internal-delay-ns = <6>;
458 #address-cells = <1>;
459 #size-cells = <0>;
464 compatible = "renesas,i2c-r8a7792",
465 "renesas,rcar-gen2-i2c";
468 clocks = <&cpg CPG_MOD 929>;
469 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
470 resets = <&cpg 929>;
471 i2c-scl-internal-delay-ns = <6>;
472 #address-cells = <1>;
473 #size-cells = <0>;
478 compatible = "renesas,i2c-r8a7792",
479 "renesas,rcar-gen2-i2c";
482 clocks = <&cpg CPG_MOD 928>;
483 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
484 resets = <&cpg 928>;
485 i2c-scl-internal-delay-ns = <6>;
486 #address-cells = <1>;
487 #size-cells = <0>;
492 compatible = "renesas,i2c-r8a7792",
493 "renesas,rcar-gen2-i2c";
496 clocks = <&cpg CPG_MOD 927>;
497 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
498 resets = <&cpg 927>;
499 i2c-scl-internal-delay-ns = <6>;
500 #address-cells = <1>;
501 #size-cells = <0>;
506 compatible = "renesas,i2c-r8a7792",
507 "renesas,rcar-gen2-i2c";
510 clocks = <&cpg CPG_MOD 925>;
511 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
512 resets = <&cpg 925>;
513 i2c-scl-internal-delay-ns = <110>;
514 #address-cells = <1>;
515 #size-cells = <0>;
520 #address-cells = <1>;
521 #size-cells = <0>;
522 compatible = "renesas,iic-r8a7792",
523 "renesas,rcar-gen2-iic",
524 "renesas,rmobile-iic";
527 clocks = <&cpg CPG_MOD 926>;
530 dma-names = "tx", "rx", "tx", "rx";
531 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
532 resets = <&cpg 926>;
536 dmac0: dma-controller@e6700000 {
537 compatible = "renesas,dmac-r8a7792",
538 "renesas,rcar-dmac";
556 interrupt-names = "error",
561 clocks = <&cpg CPG_MOD 219>;
562 clock-names = "fck";
563 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
564 resets = <&cpg 219>;
565 #dma-cells = <1>;
566 dma-channels = <15>;
569 dmac1: dma-controller@e6720000 {
570 compatible = "renesas,dmac-r8a7792",
571 "renesas,rcar-dmac";
589 interrupt-names = "error",
594 clocks = <&cpg CPG_MOD 218>;
595 clock-names = "fck";
596 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
597 resets = <&cpg 218>;
598 #dma-cells = <1>;
599 dma-channels = <15>;
603 compatible = "renesas,etheravb-r8a7792",
604 "renesas,etheravb-rcar-gen2";
607 clocks = <&cpg CPG_MOD 812>;
608 clock-names = "fck";
609 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
610 resets = <&cpg 812>;
611 #address-cells = <1>;
612 #size-cells = <0>;
617 compatible = "renesas,qspi-r8a7792", "renesas,qspi";
620 clocks = <&cpg CPG_MOD 917>;
623 dma-names = "tx", "rx", "tx", "rx";
624 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
625 resets = <&cpg 917>;
626 num-cs = <1>;
627 #address-cells = <1>;
628 #size-cells = <0>;
633 compatible = "renesas,scif-r8a7792",
634 "renesas,rcar-gen2-scif", "renesas,scif";
637 clocks = <&cpg CPG_MOD 721>,
638 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
639 clock-names = "fck", "brg_int", "scif_clk";
642 dma-names = "tx", "rx", "tx", "rx";
643 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
644 resets = <&cpg 721>;
649 compatible = "renesas,scif-r8a7792",
650 "renesas,rcar-gen2-scif", "renesas,scif";
653 clocks = <&cpg CPG_MOD 720>,
654 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
655 clock-names = "fck", "brg_int", "scif_clk";
658 dma-names = "tx", "rx", "tx", "rx";
659 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
660 resets = <&cpg 720>;
665 compatible = "renesas,scif-r8a7792",
666 "renesas,rcar-gen2-scif", "renesas,scif";
669 clocks = <&cpg CPG_MOD 719>,
670 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
671 clock-names = "fck", "brg_int", "scif_clk";
674 dma-names = "tx", "rx", "tx", "rx";
675 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
676 resets = <&cpg 719>;
681 compatible = "renesas,scif-r8a7792",
682 "renesas,rcar-gen2-scif", "renesas,scif";
685 clocks = <&cpg CPG_MOD 718>,
686 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
687 clock-names = "fck", "brg_int", "scif_clk";
690 dma-names = "tx", "rx", "tx", "rx";
691 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
692 resets = <&cpg 718>;
697 compatible = "renesas,hscif-r8a7792",
698 "renesas,rcar-gen2-hscif", "renesas,hscif";
701 clocks = <&cpg CPG_MOD 717>,
702 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
703 clock-names = "fck", "brg_int", "scif_clk";
706 dma-names = "tx", "rx", "tx", "rx";
707 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
708 resets = <&cpg 717>;
713 compatible = "renesas,hscif-r8a7792",
714 "renesas,rcar-gen2-hscif", "renesas,hscif";
717 clocks = <&cpg CPG_MOD 716>,
718 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
719 clock-names = "fck", "brg_int", "scif_clk";
722 dma-names = "tx", "rx", "tx", "rx";
723 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
724 resets = <&cpg 716>;
729 compatible = "renesas,msiof-r8a7792",
730 "renesas,rcar-gen2-msiof";
733 clocks = <&cpg CPG_MOD 000>;
736 dma-names = "tx", "rx", "tx", "rx";
737 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
738 resets = <&cpg 000>;
739 #address-cells = <1>;
740 #size-cells = <0>;
745 compatible = "renesas,msiof-r8a7792",
746 "renesas,rcar-gen2-msiof";
749 clocks = <&cpg CPG_MOD 208>;
752 dma-names = "tx", "rx", "tx", "rx";
753 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
754 resets = <&cpg 208>;
755 #address-cells = <1>;
756 #size-cells = <0>;
761 compatible = "renesas,can-r8a7792",
762 "renesas,rcar-gen2-can";
765 clocks = <&cpg CPG_MOD 916>,
766 <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
767 clock-names = "clkp1", "clkp2", "can_clk";
768 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
769 resets = <&cpg 916>;
774 compatible = "renesas,can-r8a7792",
775 "renesas,rcar-gen2-can";
778 clocks = <&cpg CPG_MOD 915>,
779 <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
780 clock-names = "clkp1", "clkp2", "can_clk";
781 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
782 resets = <&cpg 915>;
787 compatible = "renesas,vin-r8a7792",
788 "renesas,rcar-gen2-vin";
791 clocks = <&cpg CPG_MOD 811>;
792 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
793 resets = <&cpg 811>;
798 compatible = "renesas,vin-r8a7792",
799 "renesas,rcar-gen2-vin";
802 clocks = <&cpg CPG_MOD 810>;
803 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
804 resets = <&cpg 810>;
809 compatible = "renesas,vin-r8a7792",
810 "renesas,rcar-gen2-vin";
813 clocks = <&cpg CPG_MOD 809>;
814 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
815 resets = <&cpg 809>;
820 compatible = "renesas,vin-r8a7792",
821 "renesas,rcar-gen2-vin";
824 clocks = <&cpg CPG_MOD 808>;
825 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
826 resets = <&cpg 808>;
831 compatible = "renesas,vin-r8a7792",
832 "renesas,rcar-gen2-vin";
835 clocks = <&cpg CPG_MOD 805>;
836 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
837 resets = <&cpg 805>;
842 compatible = "renesas,vin-r8a7792",
843 "renesas,rcar-gen2-vin";
846 clocks = <&cpg CPG_MOD 804>;
847 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
848 resets = <&cpg 804>;
853 compatible = "renesas,sdhi-r8a7792",
854 "renesas,rcar-gen2-sdhi";
859 dma-names = "tx", "rx", "tx", "rx";
860 clocks = <&cpg CPG_MOD 314>;
861 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
862 resets = <&cpg 314>;
866 gic: interrupt-controller@f1001000 {
867 compatible = "arm,gic-400";
868 #interrupt-cells = <3>;
869 interrupt-controller;
876 clocks = <&cpg CPG_MOD 408>;
877 clock-names = "clk";
878 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
879 resets = <&cpg 408>;
886 clocks = <&cpg CPG_MOD 131>;
887 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
888 resets = <&cpg 131>;
895 clocks = <&cpg CPG_MOD 128>;
896 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
897 resets = <&cpg 128>;
904 clocks = <&cpg CPG_MOD 127>;
905 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
906 resets = <&cpg 127>;
909 jpu: jpeg-codec@fe980000 {
910 compatible = "renesas,jpu-r8a7792",
911 "renesas,rcar-gen2-jpu";
914 clocks = <&cpg CPG_MOD 106>;
915 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
916 resets = <&cpg 106>;
920 compatible = "renesas,du-r8a7792";
924 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
925 clock-names = "du.0", "du.1";
926 resets = <&cpg 724>;
927 reset-names = "du.0";
931 #address-cells = <1>;
932 #size-cells = <0>;
953 compatible = "renesas,r8a7792-cmt0",
954 "renesas,rcar-gen2-cmt0";
958 clocks = <&cpg CPG_MOD 124>;
959 clock-names = "fck";
960 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
961 resets = <&cpg 124>;
967 compatible = "renesas,r8a7792-cmt1",
968 "renesas,rcar-gen2-cmt1";
978 clocks = <&cpg CPG_MOD 329>;
979 clock-names = "fck";
980 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
981 resets = <&cpg 329>;
988 compatible = "arm,armv7-timer";
989 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
993 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";