Lines Matching +full:rcar +full:- +full:gen2 +full:- +full:iic
1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/r8a73a4-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a15";
28 clock-frequency = <1500000000>;
29 power-domains = <&pd_a2sl>;
30 next-level-cache = <&L2_CA15>;
33 L2_CA15: cache-controller-0 {
36 power-domains = <&pd_a3sm>;
37 cache-unified;
38 cache-level = <2>;
41 L2_CA7: cache-controller-1 {
44 power-domains = <&pd_a3km>;
45 cache-unified;
46 cache-level = <2>;
51 compatible = "arm,coresight-etm3x";
52 power-domains = <&pd_d4>;
56 compatible = "arm,armv7-timer";
61 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";
65 compatible = "renesas,tmu-r8a73a4", "renesas,tmu";
70 interrupt-names = "tuni0", "tuni1", "tuni2";
72 clock-names = "fck";
73 power-domains = <&pd_c5>;
78 compatible = "renesas,tmu-r8a73a4", "renesas,tmu";
83 interrupt-names = "tuni0", "tuni1", "tuni2";
85 clock-names = "fck";
86 power-domains = <&pd_a3r>;
90 dbsc1: memory-controller@e6790000 {
91 compatible = "renesas,dbsc-r8a73a4";
93 power-domains = <&pd_a3bc>;
96 dbsc2: memory-controller@e67a0000 {
97 compatible = "renesas,dbsc-r8a73a4";
99 power-domains = <&pd_a3bc>;
103 #address-cells = <1>;
104 #size-cells = <0>;
105 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
109 power-domains = <&pd_a3sp>;
115 compatible = "renesas,r8a73a4-cmt1", "renesas,rcar-gen2-cmt1";
126 clock-names = "fck";
127 power-domains = <&pd_c5>;
131 irqc0: interrupt-controller@e61c0000 {
132 compatible = "renesas,irqc-r8a73a4", "renesas,irqc";
133 #interrupt-cells = <2>;
134 interrupt-controller;
169 power-domains = <&pd_c4>;
172 irqc1: interrupt-controller@e61c0200 {
173 compatible = "renesas,irqc-r8a73a4", "renesas,irqc";
174 #interrupt-cells = <2>;
175 interrupt-controller;
204 power-domains = <&pd_c4>;
208 compatible = "renesas,pfc-r8a73a4";
210 gpio-controller;
211 #gpio-cells = <2>;
212 gpio-ranges =
219 interrupts-extended =
235 power-domains = <&pd_c5>;
239 compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal";
244 power-domains = <&pd_c5>;
248 #address-cells = <1>;
249 #size-cells = <0>;
250 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
254 power-domains = <&pd_a3sp>;
259 #address-cells = <1>;
260 #size-cells = <0>;
261 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
265 power-domains = <&pd_a3sp>;
270 #address-cells = <1>;
271 #size-cells = <0>;
272 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
276 power-domains = <&pd_a3sp>;
281 #address-cells = <1>;
282 #size-cells = <0>;
283 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
287 power-domains = <&pd_a3sp>;
292 #address-cells = <1>;
293 #size-cells = <0>;
294 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
298 power-domains = <&pd_a3sp>;
303 #address-cells = <1>;
304 #size-cells = <0>;
305 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
309 power-domains = <&pd_a3sp>;
314 #address-cells = <1>;
315 #size-cells = <0>;
316 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
320 power-domains = <&pd_a3sp>;
325 #address-cells = <1>;
326 #size-cells = <0>;
327 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
331 power-domains = <&pd_a3sp>;
336 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
340 clock-names = "fck";
341 power-domains = <&pd_a3sp>;
346 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
350 clock-names = "fck";
351 power-domains = <&pd_a3sp>;
356 compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
360 clock-names = "fck";
361 power-domains = <&pd_a3sp>;
366 compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
370 clock-names = "fck";
371 power-domains = <&pd_a3sp>;
376 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
380 clock-names = "fck";
381 power-domains = <&pd_a3sp>;
386 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
390 clock-names = "fck";
391 power-domains = <&pd_c4>;
396 compatible = "renesas,sdhi-r8a73a4";
400 power-domains = <&pd_a3sp>;
401 cap-sd-highspeed;
406 compatible = "renesas,sdhi-r8a73a4";
410 power-domains = <&pd_a3sp>;
411 cap-sd-highspeed;
416 compatible = "renesas,sdhi-r8a73a4";
420 power-domains = <&pd_a3sp>;
421 cap-sd-highspeed;
426 compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif";
430 power-domains = <&pd_a3sp>;
435 compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif";
439 power-domains = <&pd_a3sp>;
443 gic: interrupt-controller@f1001000 {
444 compatible = "arm,gic-400";
445 #interrupt-cells = <3>;
446 #address-cells = <0>;
447 interrupt-controller;
454 clock-names = "clk";
455 power-domains = <&pd_c4>;
459 compatible = "renesas,bsc-r8a73a4", "renesas,bsc",
460 "simple-pm-bus";
461 #address-cells = <1>;
462 #size-cells = <1>;
466 power-domains = <&pd_c4>;
470 #address-cells = <2>;
471 #size-cells = <2>;
476 compatible = "fixed-clock";
477 #clock-cells = <0>;
479 clock-frequency = <0>;
482 compatible = "fixed-clock";
483 #clock-cells = <0>;
485 clock-frequency = <0>;
488 compatible = "fixed-clock";
489 #clock-cells = <0>;
491 clock-frequency = <0>;
494 compatible = "fixed-clock";
495 #clock-cells = <0>;
497 clock-frequency = <0>;
500 compatible = "fixed-clock";
501 #clock-cells = <0>;
503 clock-frequency = <0>;
508 compatible = "renesas,r8a73a4-cpg-clocks";
511 #clock-cells = <1>;
512 clock-output-names = "main", "pll0", "pll1", "pll2",
520 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
524 #clock-cells = <0>;
525 clock-output-names = "zb";
528 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
532 #clock-cells = <0>;
535 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
539 #clock-cells = <0>;
542 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
546 #clock-cells = <0>;
549 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
553 #clock-cells = <0>;
556 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
560 #clock-cells = <0>;
563 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
568 #clock-cells = <0>;
571 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
576 #clock-cells = <0>;
579 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
584 #clock-cells = <0>;
587 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
592 #clock-cells = <0>;
595 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
600 #clock-cells = <0>;
603 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
607 #clock-cells = <0>;
610 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
614 #clock-cells = <0>;
617 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
621 #clock-cells = <0>;
624 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
627 #clock-cells = <0>;
630 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
634 #clock-cells = <0>;
637 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
641 #clock-cells = <0>;
646 compatible = "fixed-factor-clock";
648 #clock-cells = <0>;
649 clock-div = <2>;
650 clock-mult = <1>;
653 compatible = "fixed-factor-clock";
655 #clock-cells = <0>;
656 clock-div = <1>;
657 clock-mult = <1>;
660 compatible = "fixed-factor-clock";
662 #clock-cells = <0>;
663 clock-div = <2>;
664 clock-mult = <1>;
667 compatible = "fixed-factor-clock";
669 #clock-cells = <0>;
670 clock-div = <2>;
671 clock-mult = <1>;
674 compatible = "fixed-factor-clock";
676 #clock-cells = <0>;
677 clock-div = <2>;
678 clock-mult = <1>;
683 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
686 #clock-cells = <1>;
687 clock-indices = <
690 clock-output-names =
694 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
698 #clock-cells = <1>;
699 clock-indices = <
705 clock-output-names =
710 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
718 #clock-cells = <1>;
719 clock-indices = <
727 clock-output-names =
733 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
738 #clock-cells = <1>;
739 clock-indices = <
744 clock-output-names =
745 "irqc", "intc-sys", "iic5", "iic4", "iic3";
748 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
751 #clock-cells = <1>;
752 clock-indices = <
755 clock-output-names =
765 sysc: system-controller@e6180000 {
766 compatible = "renesas,sysc-r8a73a4", "renesas,sysc-rmobile";
769 pm-domains {
771 #address-cells = <1>;
772 #size-cells = <0>;
773 #power-domain-cells = <0>;
777 #address-cells = <1>;
778 #size-cells = <0>;
779 #power-domain-cells = <0>;
783 #power-domain-cells = <0>;
788 #power-domain-cells = <0>;
793 #address-cells = <1>;
794 #size-cells = <0>;
795 #power-domain-cells = <0>;
799 #power-domain-cells = <0>;
805 #address-cells = <1>;
806 #size-cells = <0>;
807 #power-domain-cells = <0>;
811 #power-domain-cells = <0>;
817 #address-cells = <1>;
818 #size-cells = <0>;
819 #power-domain-cells = <0>;
823 #power-domain-cells = <0>;
830 #power-domain-cells = <0>;
835 #power-domain-cells = <0>;
840 #power-domain-cells = <0>;
845 #address-cells = <1>;
846 #size-cells = <0>;
847 #power-domain-cells = <0>;
851 #power-domain-cells = <0>;
857 #power-domain-cells = <0>;
862 #power-domain-cells = <0>;
867 #address-cells = <1>;
868 #size-cells = <0>;
869 #power-domain-cells = <0>;
873 #power-domain-cells = <0>;
878 #power-domain-cells = <0>;
884 #power-domain-cells = <0>;
889 #address-cells = <1>;
890 #size-cells = <0>;
891 #power-domain-cells = <0>;
895 #power-domain-cells = <0>;
900 #power-domain-cells = <0>;