Lines Matching full:cpg_clocks

27 			clocks = <&cpg_clocks R8A73A4_CLK_Z>;
35 			clocks = <&cpg_clocks R8A73A4_CLK_Z>;
43 			clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
507 		cpg_clocks: cpg_clocks@e6150000 {  label
523 				 <&cpg_clocks R8A73A4_CLK_PLL2S>, <0>;
530 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
537 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
544 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
551 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
558 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
565 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
573 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
581 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
589 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
597 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
605 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
612 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
619 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
626 			clocks = <&cpg_clocks R8A73A4_CLK_PLL2S>;
632 			clocks = <&cpg_clocks R8A73A4_CLK_PLL2H>, <&pll1_div2_clk>,
633 				 <&cpg_clocks R8A73A4_CLK_PLL2S>, <0>;
639 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
647 			clocks = <&cpg_clocks R8A73A4_CLK_MAIN>;
661 			clocks = <&cpg_clocks R8A73A4_CLK_PLL0>;
668 			clocks = <&cpg_clocks R8A73A4_CLK_PLL1>;
697 				 <&mp_clk>, <&mp_clk>, <&cpg_clocks R8A73A4_CLK_HP>;
712 			clocks = <&cpg_clocks R8A73A4_CLK_HP>, <&mmc1_clk>,
714 				 <&mmc0_clk>, <&cpg_clocks R8A73A4_CLK_HP>,
715 				 <&cpg_clocks R8A73A4_CLK_HP>, <&cpg_clocks
716 				 R8A73A4_CLK_HP>, <&cpg_clocks
735 			clocks = <&cp_clk>, <&cpg_clocks R8A73A4_CLK_ZS>,
736 				 <&cp_clk>, <&cpg_clocks R8A73A4_CLK_HP>,
737 				 <&cpg_clocks R8A73A4_CLK_HP>;
750 			clocks = <&cp_clk>, <&cpg_clocks R8A73A4_CLK_HP>;