Lines Matching +full:spi +full:- +full:present +full:- +full:mask

1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-14 Renesas Solutions Corp.
6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
9 #include <dt-bindings/clock/r7s72100-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
32 #clock-cells = <0>;
33 compatible = "fixed-factor-clock";
35 clock-mult = <1>;
36 clock-div = <3>;
40 compatible = "simple-bus";
41 #address-cells = <1>;
42 #size-cells = <1>;
47 #address-cells = <1>;
48 #size-cells = <0>;
52 compatible = "arm,cortex-a9";
54 clock-frequency = <400000000>;
56 next-level-cache = <&L2>;
62 #clock-cells = <0>;
63 compatible = "fixed-clock";
64 /* If clk present, value must be set by board */
65 clock-frequency = <0>;
69 #clock-cells = <0>;
70 compatible = "fixed-factor-clock";
72 clock-mult = <1>;
73 clock-div = <12>;
77 #clock-cells = <0>;
78 compatible = "fixed-factor-clock";
80 clock-mult = <1>;
81 clock-div = <6>;
85 compatible = "arm,cortex-a9-pmu";
86 interrupts-extended = <&gic GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>;
90 #clock-cells = <0>;
91 compatible = "fixed-clock";
92 /* If clk present, value must be set by board to 32678 */
93 clock-frequency = <0>;
97 #clock-cells = <0>;
98 compatible = "fixed-clock";
99 /* If clk present, value must be set by board to 4000000 */
100 clock-frequency = <0>;
104 compatible = "simple-bus";
105 interrupt-parent = <&gic>;
107 #address-cells = <1>;
108 #size-cells = <1>;
111 L2: cache-controller@3ffff000 {
112 compatible = "arm,pl310-cache";
115 arm,early-bresp-disable;
116 arm,full-line-zero-disable;
117 cache-unified;
118 cache-level = <2>;
122 compatible = "renesas,scif-r7s72100", "renesas,scif";
128 interrupt-names = "eri", "rxi", "txi", "bri";
130 clock-names = "fck";
131 power-domains = <&cpg_clocks>;
136 compatible = "renesas,scif-r7s72100", "renesas,scif";
142 interrupt-names = "eri", "rxi", "txi", "bri";
144 clock-names = "fck";
145 power-domains = <&cpg_clocks>;
150 compatible = "renesas,scif-r7s72100", "renesas,scif";
156 interrupt-names = "eri", "rxi", "txi", "bri";
158 clock-names = "fck";
159 power-domains = <&cpg_clocks>;
164 compatible = "renesas,scif-r7s72100", "renesas,scif";
170 interrupt-names = "eri", "rxi", "txi", "bri";
172 clock-names = "fck";
173 power-domains = <&cpg_clocks>;
178 compatible = "renesas,scif-r7s72100", "renesas,scif";
184 interrupt-names = "eri", "rxi", "txi", "bri";
186 clock-names = "fck";
187 power-domains = <&cpg_clocks>;
192 compatible = "renesas,scif-r7s72100", "renesas,scif";
198 interrupt-names = "eri", "rxi", "txi", "bri";
200 clock-names = "fck";
201 power-domains = <&cpg_clocks>;
206 compatible = "renesas,scif-r7s72100", "renesas,scif";
212 interrupt-names = "eri", "rxi", "txi", "bri";
214 clock-names = "fck";
215 power-domains = <&cpg_clocks>;
220 compatible = "renesas,scif-r7s72100", "renesas,scif";
226 interrupt-names = "eri", "rxi", "txi", "bri";
228 clock-names = "fck";
229 power-domains = <&cpg_clocks>;
233 spi0: spi@e800c800 {
234 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
239 interrupt-names = "error", "rx", "tx";
242 dma-names = "tx", "rx";
243 power-domains = <&cpg_clocks>;
244 num-cs = <1>;
245 #address-cells = <1>;
246 #size-cells = <0>;
250 spi1: spi@e800d000 {
251 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
256 interrupt-names = "error", "rx", "tx";
259 dma-names = "tx", "rx";
260 power-domains = <&cpg_clocks>;
261 num-cs = <1>;
262 #address-cells = <1>;
263 #size-cells = <0>;
267 spi2: spi@e800d800 {
268 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
273 interrupt-names = "error", "rx", "tx";
276 dma-names = "tx", "rx";
277 power-domains = <&cpg_clocks>;
278 num-cs = <1>;
279 #address-cells = <1>;
280 #size-cells = <0>;
284 spi3: spi@e800e000 {
285 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
290 interrupt-names = "error", "rx", "tx";
293 dma-names = "tx", "rx";
294 power-domains = <&cpg_clocks>;
295 num-cs = <1>;
296 #address-cells = <1>;
297 #size-cells = <0>;
301 spi4: spi@e800e800 {
302 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
307 interrupt-names = "error", "rx", "tx";
310 dma-names = "tx", "rx";
311 power-domains = <&cpg_clocks>;
312 num-cs = <1>;
313 #address-cells = <1>;
314 #size-cells = <0>;
319 compatible = "renesas,usbhs-r7s72100", "renesas,rza1-usbhs";
324 power-domains = <&cpg_clocks>;
329 compatible = "renesas,usbhs-r7s72100", "renesas,rza1-usbhs";
334 power-domains = <&cpg_clocks>;
339 compatible = "renesas,mmcif-r7s72100", "renesas,sh-mmcif";
346 dma-names = "tx", "rx";
347 power-domains = <&cpg_clocks>;
352 compatible = "renesas,sdhi-r7s72100";
360 clock-names = "core", "cd";
361 power-domains = <&cpg_clocks>;
362 cap-sd-highspeed;
363 cap-sdio-irq;
368 compatible = "renesas,sdhi-r7s72100";
376 clock-names = "core", "cd";
377 power-domains = <&cpg_clocks>;
378 cap-sd-highspeed;
379 cap-sdio-irq;
383 dmac: dma-controller@e8200000 {
384 compatible = "renesas,r7s72100-dmac",
385 "renesas,rz-dmac";
405 interrupt-names = "error",
410 #dma-cells = <1>;
411 dma-channels = <16>;
414 gic: interrupt-controller@e8201000 {
416 #interrupt-cells = <3>;
417 #address-cells = <0>;
418 interrupt-controller;
424 compatible = "renesas,ether-r7s72100";
429 power-domains = <&cpg_clocks>;
430 phy-mode = "mii";
431 #address-cells = <1>;
432 #size-cells = <0>;
438 compatible = "renesas,r7s72100-ceu";
441 power-domains = <&cpg_clocks>;
446 compatible = "renesas,r7s72100-wdt", "renesas,rza-wdt";
454 #clock-cells = <1>;
455 compatible = "renesas,r7s72100-cpg-clocks",
456 "renesas,rz-cpg-clocks";
459 clock-output-names = "pll", "i", "g";
460 #power-domain-cells = <0>;
465 #clock-cells = <1>;
466 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
469 clock-indices = <R7S72100_CLK_MTU2>;
470 clock-output-names = "mtu2";
474 #clock-cells = <1>;
475 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
479 clock-indices = <
483 clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
487 #clock-cells = <1>;
488 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
491 clock-indices = <R7S72100_CLK_OSTM0 R7S72100_CLK_OSTM1>;
492 clock-output-names = "ostm0", "ostm1";
496 #clock-cells = <1>;
497 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
500 clock-indices = <R7S72100_CLK_CEU R7S72100_CLK_RTC>;
501 clock-output-names = "ceu", "rtc";
505 #clock-cells = <1>;
506 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
509 clock-indices = <R7S72100_CLK_ETHER R7S72100_CLK_USB0 R7S72100_CLK_USB1>;
510 clock-output-names = "ether", "usb0", "usb1";
514 #clock-cells = <1>;
515 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
518 clock-indices = <R7S72100_CLK_MMCIF>;
519 clock-output-names = "mmcif";
523 #clock-cells = <1>;
524 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
527 clock-indices = <
531 clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3", "spibsc0", "spibsc1";
535 #clock-cells = <1>;
536 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
540 clock-indices = <
544 clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4";
547 #clock-cells = <1>;
548 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
551 clock-indices = <
555 clock-output-names = "sdhi00", "sdhi01", "sdhi10", "sdhi11";
559 compatible = "renesas,r7s72100-ports";
563 port0: gpio-0 {
564 gpio-controller;
565 #gpio-cells = <2>;
566 gpio-ranges = <&pinctrl 0 0 6>;
569 port1: gpio-1 {
570 gpio-controller;
571 #gpio-cells = <2>;
572 gpio-ranges = <&pinctrl 0 16 16>;
575 port2: gpio-2 {
576 gpio-controller;
577 #gpio-cells = <2>;
578 gpio-ranges = <&pinctrl 0 32 16>;
581 port3: gpio-3 {
582 gpio-controller;
583 #gpio-cells = <2>;
584 gpio-ranges = <&pinctrl 0 48 16>;
587 port4: gpio-4 {
588 gpio-controller;
589 #gpio-cells = <2>;
590 gpio-ranges = <&pinctrl 0 64 16>;
593 port5: gpio-5 {
594 gpio-controller;
595 #gpio-cells = <2>;
596 gpio-ranges = <&pinctrl 0 80 11>;
599 port6: gpio-6 {
600 gpio-controller;
601 #gpio-cells = <2>;
602 gpio-ranges = <&pinctrl 0 96 16>;
605 port7: gpio-7 {
606 gpio-controller;
607 #gpio-cells = <2>;
608 gpio-ranges = <&pinctrl 0 112 16>;
611 port8: gpio-8 {
612 gpio-controller;
613 #gpio-cells = <2>;
614 gpio-ranges = <&pinctrl 0 128 16>;
617 port9: gpio-9 {
618 gpio-controller;
619 #gpio-cells = <2>;
620 gpio-ranges = <&pinctrl 0 144 8>;
623 port10: gpio-10 {
624 gpio-controller;
625 #gpio-cells = <2>;
626 gpio-ranges = <&pinctrl 0 160 16>;
629 port11: gpio-11 {
630 gpio-controller;
631 #gpio-cells = <2>;
632 gpio-ranges = <&pinctrl 0 176 16>;
637 compatible = "renesas,r7s72100-ostm", "renesas,ostm";
641 power-domains = <&cpg_clocks>;
646 compatible = "renesas,r7s72100-ostm", "renesas,ostm";
650 power-domains = <&cpg_clocks>;
655 #address-cells = <1>;
656 #size-cells = <0>;
657 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
667 interrupt-names = "tei", "ri", "ti", "spi", "sti",
670 clock-frequency = <100000>;
671 power-domains = <&cpg_clocks>;
676 #address-cells = <1>;
677 #size-cells = <0>;
678 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
688 interrupt-names = "tei", "ri", "ti", "spi", "sti",
691 clock-frequency = <100000>;
692 power-domains = <&cpg_clocks>;
697 #address-cells = <1>;
698 #size-cells = <0>;
699 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
709 interrupt-names = "tei", "ri", "ti", "spi", "sti",
712 clock-frequency = <100000>;
713 power-domains = <&cpg_clocks>;
718 #address-cells = <1>;
719 #size-cells = <0>;
720 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
730 interrupt-names = "tei", "ri", "ti", "spi", "sti",
733 clock-frequency = <100000>;
734 power-domains = <&cpg_clocks>;
738 irqc: interrupt-controller@fcfef800 {
739 compatible = "renesas,r7s72100-irqc",
740 "renesas,rza1-irqc";
741 #interrupt-cells = <2>;
742 #address-cells = <0>;
743 interrupt-controller;
745 interrupt-map =
754 interrupt-map-mask = <7 0>;
758 compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
761 interrupt-names = "tgi0a";
763 clock-names = "fck";
764 power-domains = <&cpg_clocks>;
769 compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc";
774 interrupt-names = "alarm", "period", "carry";
777 clock-names = "fck", "rtc_x1", "rtc_x3", "extal";
778 power-domains = <&cpg_clocks>;
784 #clock-cells = <0>;
785 compatible = "fixed-clock";
786 /* If clk present, value must be set by board */
787 clock-frequency = <0>;