Lines Matching full:gic_spi

114 			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
124 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
125 <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
126 <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
127 <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
138 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>,
139 <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
140 <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
141 <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
152 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
153 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
154 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
155 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
166 interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
167 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
168 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
169 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
180 interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
181 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
182 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
183 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
194 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
195 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
196 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
197 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
208 interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
209 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
210 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
211 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
222 interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
223 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
224 <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
225 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
236 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
237 <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>,
238 <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
253 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
254 <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>,
255 <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
270 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
271 <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
272 <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
287 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
288 <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
289 <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
304 interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
305 <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
306 <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
321 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
331 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
341 interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
342 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
343 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
354 interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
355 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
356 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
370 interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
371 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
372 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>;
388 interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>,
389 <GIC_SPI 9 IRQ_TYPE_EDGE_RISING>,
390 <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>,
391 <GIC_SPI 11 IRQ_TYPE_EDGE_RISING>,
392 <GIC_SPI 12 IRQ_TYPE_EDGE_RISING>,
393 <GIC_SPI 13 IRQ_TYPE_EDGE_RISING>,
394 <GIC_SPI 14 IRQ_TYPE_EDGE_RISING>,
395 <GIC_SPI 15 IRQ_TYPE_EDGE_RISING>,
396 <GIC_SPI 16 IRQ_TYPE_EDGE_RISING>,
397 <GIC_SPI 17 IRQ_TYPE_EDGE_RISING>,
398 <GIC_SPI 18 IRQ_TYPE_EDGE_RISING>,
399 <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>,
400 <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
401 <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
402 <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
403 <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>,
404 <GIC_SPI 24 IRQ_TYPE_EDGE_RISING>;
427 interrupts = <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
439 interrupts = <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
448 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
639 interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;
648 interrupts = <GIC_SPI 103 IRQ_TYPE_EDGE_RISING>;
659 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
660 <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
661 <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
662 <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
663 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
664 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
665 <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
666 <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
680 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
681 <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>,
682 <GIC_SPI 167 IRQ_TYPE_EDGE_RISING>,
683 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
684 <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
685 <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
686 <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>,
687 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
701 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>,
702 <GIC_SPI 174 IRQ_TYPE_EDGE_RISING>,
703 <GIC_SPI 175 IRQ_TYPE_EDGE_RISING>,
704 <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
705 <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>,
706 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
707 <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
708 <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
722 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
723 <GIC_SPI 182 IRQ_TYPE_EDGE_RISING>,
724 <GIC_SPI 183 IRQ_TYPE_EDGE_RISING>,
725 <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
726 <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
727 <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
728 <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
729 <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
746 <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
747 <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
748 <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
749 <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
750 <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
751 <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
752 <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
753 <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
760 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
771 interrupts = <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
772 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
773 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;