Lines Matching +full:0 +full:x021b8000
58 #size-cells = <0>;
60 cpu0: cpu@0 {
63 reg = <0>;
108 #clock-cells = <0>;
115 #clock-cells = <0>;
122 #clock-cells = <0>;
123 clock-frequency = <0>;
129 #clock-cells = <0>;
130 clock-frequency = <0>;
149 reg = <0x00900000 0x20000>;
150 ranges = <0 0x00900000 0x20000>;
161 reg = <0x00a01000 0x1000>,
162 <0x00a02000 0x2000>,
163 <0x00a04000 0x2000>,
164 <0x00a06000 0x2000>;
169 reg = <0x01804000 0x2000>;
170 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
171 <0 13 IRQ_TYPE_LEVEL_HIGH>,
172 <0 13 IRQ_TYPE_LEVEL_HIGH>,
173 <0 13 IRQ_TYPE_LEVEL_HIGH>;
182 #size-cells = <0>;
183 reg = <0x01806000 0x2000>, <0x01808000 0x2000>;
185 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
194 dmas = <&dma_apbh 0>;
203 reg = <0x02000000 0x100000>;
210 reg = <0x02000000 0x40000>;
215 #size-cells = <0>;
217 reg = <0x02008000 0x4000>;
229 #size-cells = <0>;
231 reg = <0x0200c000 0x4000>;
243 #size-cells = <0>;
245 reg = <0x02010000 0x4000>;
257 #size-cells = <0>;
259 reg = <0x02014000 0x4000>;
272 reg = <0x02018000 0x4000>;
277 dmas = <&sdma 43 4 0>, <&sdma 44 4 0>;
285 reg = <0x02020000 0x4000>;
290 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
298 reg = <0x02024000 0x4000>;
303 dmas = <&sdma 45 4 0>, <&sdma 46 4 0>;
309 #sound-dai-cells = <0>;
311 reg = <0x02028000 0x4000>;
317 dmas = <&sdma 35 24 0>,
318 <&sdma 36 24 0>;
324 #sound-dai-cells = <0>;
326 reg = <0x0202c000 0x4000>;
332 dmas = <&sdma 37 24 0>,
333 <&sdma 38 24 0>;
339 #sound-dai-cells = <0>;
341 reg = <0x02030000 0x4000>;
347 dmas = <&sdma 39 24 0>,
348 <&sdma 40 24 0>;
355 reg = <0x2034000 0x4000>;
358 <&clks IMX6UL_CLK_ASRC_MEM>, <&clks 0>,
359 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
360 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
361 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
362 <&clks IMX6UL_CLK_SPDIF>, <&clks 0>, <&clks 0>,
381 reg = <0x02040000 0x4000>, <0x0219c000 0x4000>;
392 reg = <0x02080000 0x4000>;
403 reg = <0x02084000 0x4000>;
414 reg = <0x02088000 0x4000>;
425 reg = <0x0208c000 0x4000>;
436 reg = <0x02090000 0x4000>;
441 fsl,stop-mode = <&gpr 0x10 1>;
447 reg = <0x02094000 0x4000>;
452 fsl,stop-mode = <&gpr 0x10 2>;
458 reg = <0x02098000 0x4000>;
467 reg = <0x0209c000 0x4000>;
475 gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>,
481 reg = <0x020a0000 0x4000>;
489 gpio-ranges = <&iomuxc 0 49 16>, <&iomuxc 16 111 6>;
494 reg = <0x020a4000 0x4000>;
502 gpio-ranges = <&iomuxc 0 65 29>;
507 reg = <0x020a8000 0x4000>;
515 gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>;
520 reg = <0x020ac000 0x4000>;
528 gpio-ranges = <&iomuxc 0 7 10>, <&iomuxc 10 5 2>;
533 reg = <0x020b4000 0x4000>;
545 fsl,stop-mode = <&gpr 0x10 4>;
554 reg = <0x020b8000 0x4000>;
562 reg = <0x020bc000 0x4000>;
569 reg = <0x020c0000 0x4000>;
577 reg = <0x020c4000 0x4000>;
588 reg = <0x020c8000 0x1000>;
598 anatop-reg-offset = <0x120>;
601 anatop-min-bit-val = <0>;
604 anatop-enable-bit = <0>;
613 anatop-reg-offset = <0x140>;
614 anatop-vol-bit-shift = <0>;
616 anatop-delay-reg-offset = <0x170>;
630 anatop-reg-offset = <0x140>;
633 anatop-delay-reg-offset = <0x170>;
649 #thermal-sensor-cells = <0>;
655 reg = <0x020c9000 0x1000>;
664 reg = <0x020ca000 0x1000>;
672 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
673 reg = <0x020cc000 0x4000>;
676 compatible = "fsl,sec-v4.0-mon-rtc-lp";
678 offset = <0x34>;
686 offset = <0x38>;
687 value = <0x60>;
688 mask = <0x60>;
693 compatible = "fsl,sec-v4.0-pwrkey";
707 reg = <0x020d0000 0x4000>;
712 reg = <0x020d4000 0x4000>;
718 reg = <0x020d8000 0x4000>;
726 reg = <0x020dc000 0x4000>;
736 #size-cells = <0>;
738 power-domain@0 {
739 reg = <0>;
740 #power-domain-cells = <0>;
747 reg = <0x020e0000 0x4000>;
753 reg = <0x020e4000 0x4000>;
758 reg = <0x020e8000 0x4000>;
769 reg = <0x020ec000 0x4000>;
780 reg = <0x020f0000 0x4000>;
791 reg = <0x020f4000 0x4000>;
802 reg = <0x020f8000 0x4000>;
813 reg = <0x020fc000 0x4000>;
827 reg = <0x02100000 0x100000>;
831 compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";
834 reg = <0x2140000 0x3c000>;
835 ranges = <0 0x2140000 0x3c000>;
842 compatible = "fsl,sec-v4.0-job-ring";
843 reg = <0x1000 0x1000>;
848 compatible = "fsl,sec-v4.0-job-ring";
849 reg = <0x2000 0x1000>;
854 compatible = "fsl,sec-v4.0-job-ring";
855 reg = <0x3000 0x1000>;
862 reg = <0x02184000 0x200>;
866 fsl,usbmisc = <&usbmisc 0>;
867 ahb-burst-config = <0x0>;
868 tx-burst-size-dword = <0x10>;
869 rx-burst-size-dword = <0x10>;
875 reg = <0x02184200 0x200>;
880 ahb-burst-config = <0x0>;
881 tx-burst-size-dword = <0x10>;
882 rx-burst-size-dword = <0x10>;
889 reg = <0x02184800 0x200>;
894 reg = <0x02188000 0x4000>;
906 fsl,stop-mode = <&gpr 0x10 3>;
915 reg = <0x02190000 0x4000>;
929 reg = <0x02194000 0x4000>;
943 reg = <0x02198000 0x4000>;
954 #size-cells = <0>;
956 reg = <0x021a0000 0x4000>;
964 #size-cells = <0>;
966 reg = <0x021a4000 0x4000>;
974 #size-cells = <0>;
976 reg = <0x021a8000 0x4000>;
984 reg = <0x021b0000 0x4000>;
992 reg = <0x021b8000 0x4000>;
1003 reg = <0x021bc000 0x4000>;
1007 reg = <0x38 4>;
1011 reg = <0x20 4>;
1015 reg = <0x10 4>;
1019 reg = <0x88 6>;
1023 reg = <0x8e 6>;
1029 reg = <0x021c4000 0x4000>;
1038 reg = <0x021c8000 0x4000>;
1049 reg = <0x021cc000 0x4000>;
1057 #size-cells = <0>;
1059 reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>;
1070 reg = <0x021e4000 0x4000>;
1079 reg = <0x021e8000 0x4000>;
1084 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
1092 reg = <0x021ec000 0x4000>;
1097 dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
1105 reg = <0x021f0000 0x4000>;
1110 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
1118 reg = <0x021f4000 0x4000>;
1123 dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
1130 #size-cells = <0>;
1132 reg = <0x021f8000 0x4000>;
1141 reg = <0x021fc000 0x4000>;
1146 dmas = <&sdma 0 4 0>, <&sdma 47 4 0>;